module pwm2( clk, clr, duty, pw); //---Ports declearation: generated by Robei--- input clk; input clr; input duty; output pw; wire clk; wire clr; wire duty; reg pw; //----Code starts here: integrated by Robei----- reg pwm; reg [31:0] CNT=0; parameter period = 1000000; parameter h_time = 150000; parameter h_time1 = 110000; parameter h_time2 = 190000; parameter h_time3 = 80000; parameter h_time4 = 220000; assign PWM = pwm; always @ (posedge clk) begin if(clr) CNT <= 0; else if(CNT == period ) CNT <= 0; else CNT <= CNT + 1; end always @ (posedge clk) begin if(clr) pwm <= 0; else begin if(duty == 3'd0) begin if(CNT<=h_time) pwm <= 1; else pwm <= 0; end else if(duty == 3'd1) begin if(CNT<=h_time2) pwm <= 1; else pwm <= 0; end else if(duty == 3'd2) begin if(CNT<=h_time1) pwm <= 1; else pwm <= 0; end else if(duty == 3'd3) begin if(CNT<=h_time4) pwm <= 1; else pwm <= 0; end else if(duty == 3'd4) begin if(CNT<=h_time3) pwm <= 1; else pwm <= 0; end end end endmodule //pwm2

这段代码实现了一个简单的PWM模块，接收时钟信号clk、清零信号clr和占空比duty，输出PWM输出信号pw。该模块通过计数器CNT来实现PWM的周期控制，当CNT计数到period时会清零，然后根据duty的取值选择相应的高电平时间h_time进行PWM输出。具体来说，当duty为0时，PWM输出高电平时间为h_time；当duty为1时，PWM输出高电平时间为h_time2；当duty为2时，PWM输出高电平时间为h_time1；当duty为3时，PWM输出高电平时间为h_time4；当duty为4时，PWM输出高电平时间为h_time3。在每个时钟上升沿时，根据CLR和CNT的状态，更新PWM输出信号pwm的值。