cadence的多层次的spef文件，来个大的例子

以下是一个 Cadence 的多层次 SPEF 文件的示例：

* SPEF 1.0
* DESIGN "my_design"
* DATE "2021-05-01"
* VENDOR "my_vendor"
* PROGRAM "my_program"
* VERSION "1.0"

* DELAY FILE "my_design.sdf"

* DESIGN DEFAULT CAPACITANCE UNIT FF
* DESIGN DEFAULT RESISTANCE UNIT K
* DESIGN DEFAULT TIME UNIT PS

* CLOCK clk ( PORT )
( CAPACITANCE 10 )
( RESISTANCE 1 )
( SOURCE "clk" )

* PORT in1 ( PORT )
( CAPACITANCE 10 )
( RESISTANCE 1 )
( DIRECTION INPUT )

* PORT in2 ( PORT )
( CAPACITANCE 15 )
( RESISTANCE 1 )
( DIRECTION INPUT )

* PORT out1 ( PORT )
( CAPACITANCE 5 )
( RESISTANCE 0.5 )
( DIRECTION OUTPUT )

* SUBNET sub1 ( SUBNET )
( CAPACITANCE 20 )
( RESISTANCE 2 )
( SOURCE "sub1" )
( CONNECT ( IN in1 ( CAP 5 RES 0.5 ) ) )
( CONNECT ( IN in2 ( CAP 5 RES 0.5 ) ) )
( CONNECT ( OUT out1 ( CAP 10 RES 1 ) ) )

* SUBNET sub2 ( SUBNET )
( CAPACITANCE 30 )
( RESISTANCE 3 )
( SOURCE "sub2" )
( CONNECT ( IN in1 ( CAP 10 RES 1 ) ) )
( CONNECT ( IN in2 ( CAP 15 RES 1 ) ) )
( CONNECT ( OUT out1 ( CAP 5 RES 0.5 ) ) )

* NETLIST ( NET )
( NAME in1 )
( CAPACITANCE 10 )
( RESISTANCE 1 )
( CONNECT ( IN in1 ( CAP 10 RES 1 ) ) )

( NAME in2 )
( CAPACITANCE 15 )
( RESISTANCE 1 )
( CONNECT ( IN in2 ( CAP 15 RES 1 ) ) )

( NAME sub1.out1 )
( CAPACITANCE 10 )
( RESISTANCE 1 )
( CONNECT ( OUT sub1.out1 ( CAP 10 RES 1 ) ) )

( NAME sub2.out1 )
( CAPACITANCE 5 )
( RESISTANCE 0.5 )
( CONNECT ( OUT sub2.out1 ( CAP 5 RES 0.5 ) ) )

( NAME out1 )
( CAPACITANCE 5 )
( RESISTANCE 0.5 )
( CONNECT ( OUT out1 ( CAP 5 RES 0.5 ) ) )

在这个 SPEF 文件中，有顶层时钟、顶层端口、两个子电路、以及一个电路的净表。每个对象都有其自己的属性和子属性。例如，顶层端口具有名称、电容和电阻等属性，而子电路具有实例名称、电容和电阻、以及子电路中的净名称和净电容等属性。净表也具有净名称、电容和电阻等属性。这个 SPEF 文件的结构可以让电路设计工程师更好地理解和分析电路。和前面的例子不同，这里的 SPEF 文件使用了 Cadence 的 SPEF 格式，使用了不同的对象和属性名称。