用行为语句设计一个8位可变模计数器, 要求:1. 当计数器计到1xx(“xx”为学号后两位)时,自动从零开始重新计数,同时产生一个高电平。 2. 当有加载信号时,装入预置的值(班内序号)。我的学号最后一位93,班内序号3 。写出题目的modelsim测试程序
时间: 2024-02-18 09:06:21 浏览: 140
以下是一个可变模计数器的行为语句设计,满足题目要求:
```vhdl
library ieee;
use ieee.std_logic_1164.all;
entity counter is
port (
clk: in std_logic;
reset: in std_logic;
load: in std_logic;
preset: in std_logic_vector(7 downto 0);
out_count: out std_logic_vector(7 downto 0);
out_high: out std_logic
);
end entity counter;
architecture behavior of counter is
signal count: std_logic_vector(7 downto 0);
begin
process(clk, reset)
begin
if reset = '1' then
count <= "00000000";
out_high <= '0';
elsif rising_edge(clk) then
if load = '1' then
count <= preset;
elsif count = ("1" & "00" & "1001") then
count <= "00000000";
out_high <= '1';
else
count <= count + 1;
out_high <= '0';
end if;
end if;
end process;
out_count <= count;
end architecture behavior;
```
以下是一个简单的ModelSim测试程序,用于测试可变模计数器的功能:
```vhdl
library ieee;
use ieee.std_logic_1164.all;
entity counter_tb is
end entity counter_tb;
architecture behavior of counter_tb is
signal clk: std_logic := '0';
signal reset: std_logic := '0';
signal load: std_logic := '0';
signal preset: std_logic_vector(7 downto 0) := "00000011";
signal out_count: std_logic_vector(7 downto 0);
signal out_high: std_logic;
constant PERIOD: time := 10 ns;
begin
uut: entity work.counter
port map (
clk => clk,
reset => reset,
load => load,
preset => preset,
out_count => out_count,
out_high => out_high
);
clk_process: process
begin
while now < 1000 ns loop
clk <= not clk;
wait for PERIOD / 2;
end loop;
wait;
end process;
reset_process: process
begin
reset <= '1';
wait for 50 ns;
reset <= '0';
wait for 50 ns;
reset <= '1';
wait;
end process;
load_process: process
begin
wait for 200 ns;
load <= '1';
wait for 10 ns;
load <= '0';
wait for 200 ns;
load <= '1';
wait for 10 ns;
load <= '0';
wait;
end process;
stimulus: process
begin
wait for 100 ns;
assert out_count = "00000000" and out_high = '0' report "Test failed" severity error;
wait for 500 ns;
assert out_count = "00000101" and out_high = '0' report "Test failed" severity error;
wait for 500 ns;
assert out_count = "00001010" and out_high = '0' report "Test failed" severity error;
wait for 500 ns;
assert out_count = "00001111" and out_high = '0' report "Test failed" severity error;
wait for 500 ns;
assert out_count = "00010100" and out_high = '0' report "Test failed" severity error;
wait for 500 ns;
assert out_count = "00011001" and out_high = '1' report "Test failed" severity error;
wait for 500 ns;
assert out_count = "00000000" and out_high = '1' report "Test failed" severity error;
wait for 500 ns;
assert out_count = "00000101" and out_high = '0' report "Test failed" severity error;
wait;
end process;
end architecture behavior;
```
这个测试程序会测试可变模计数器的递增功能、重置功能和装载功能。在测试中,会先重置计数器,等待一段时间后,装载预置值。然后计数器会递增,直到计数器计到193时,会自动从零开始重新计数,同时产生一个高电平。测试程序会检查计数器的输出是否符合预期,如果不符合,则会报告测试失败。
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