stm32F030窗口看门狗与独立看门狗的代码

以下是STM32F030的窗口看门狗和独立看门狗的代码示例：

窗口看门狗：

#include "stm32f0xx.h"
#include "stm32f0xx_iwdg.h"

void IWDG_Config(void)
{
  /* Enable write access to IWDG_PR and IWDG_RLR registers */
  IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);

  /* IWDG counter clock: 40KHz(LSI) / 32 = 1.25 KHz */
  IWDG_SetPrescaler(IWDG_Prescaler_32);

  /* Set counter reload value to obtain 1000ms IWDG TimeOut.
     Counter Reload Value = 1000ms / IWDG counter clock period
                          = 1000ms / (1.25 KHz / 32)
                          = 1000ms / 39.125
                          = 25.6 */
  IWDG_SetReload(25);

  /* Reload IWDG counter */
  IWDG_ReloadCounter();

  /* Enable IWDG (the LSI oscillator will be enabled by hardware) */
  IWDG_Enable();
}

int main(void)
{
  /* Configure the system clock to 48 MHz */
  RCC_ClockConfig(RCC_SYSCLK_Div1);

  /* Configure the IWDG */
  IWDG_Config();

  while (1)
  {
    /* Wait for the IWDG TimeOut */
    while (IWDG_GetFlagStatus(IWDG_FLAG_PVU) == RESET);

    /* Reload IWDG counter */
    IWDG_ReloadCounter();
  }
}

独立看门狗：

#include "stm32f0xx.h"
#include "stm32f0xx_iwdg.h"

void IWDG_Config(void)
{
  /* Enable write access to IWDG_PR and IWDG_RLR registers */
  IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);

  /* IWDG counter clock: 40KHz(LSI) / 32 = 1.25 KHz */
  IWDG_SetPrescaler(IWDG_Prescaler_32);

  /* Set counter reload value to obtain 1000ms IWDG TimeOut.
     Counter Reload Value = 1000ms / IWDG counter clock period
                          = 1000ms / (1.25 KHz / 32)
                          = 1000ms / 39.125
                          = 25.6 */
  IWDG_SetReload(25);

  /* Reload IWDG counter */
  IWDG_ReloadCounter();

  /* Enable IWDG (the LSI oscillator will be enabled by hardware) */
  IWDG_Enable();
}

int main(void)
{
  /* Configure the system clock to 48 MHz */
  RCC_ClockConfig(RCC_SYSCLK_Div1);

  /* Configure the IWDG */
  IWDG_Config();

  while (1)
  {
    /* Wait for the IWDG TimeOut */
    while (IWDG_GetFlagStatus(IWDG_FLAG_PVU) == RESET);

    /* Reload IWDG counter */
    IWDG_ReloadCounter();
  }
}