module mul_signed(a,b,z); input [7:0] a,b; output [15:0] z; wire [7:0] ab0=b[0]?a:8'b0; wire [7:0] ab1=b[1]?a:8'b0; wire [7:0] ab2=b[2]?a:8'b0; wire [7:0] ab3=b[3]?a:8'b0; wire [7:0] ab4=b[4]?a:8'b0; wire [7:0] ab5=b[5]?a:8'b0; wire [7:0] ab6=b[6]?a:8'b0; wire [7:0] ab7=b[7]?a:8'b0; // 请补全下面为*的代码，完成带符号数乘法器的设计 /********** Begin *********/ /********** End *********/ endmodule

module mul_signed(a,b,z);
input signed [7:0] a,b;
output signed [15:0] z;
wire signed [7:0] ab0=b[0]?a:8'sb0;
wire signed [7:0] ab1=b[1]?a:8'sb0;
wire signed [7:0] ab2=b[2]?a:8'sb0;
wire signed [7:0] ab3=b[3]?a:8'sb0;
wire signed [7:0] ab4=b[4]?a:8'sb0;
wire signed [7:0] ab5=b[5]?a:8'sb0;
wire signed [7:0] ab6=b[6]?a:8'sb0;
wire signed [7:0] ab7=b[7]?a:8'sb0;
wire signed [15:0] p0 = {ab0, 8'b0}; // ab0左移0位
wire signed [15:0] p1 = {ab1, 7'b0}; // ab1左移1位
wire signed [15:0] p2 = {ab2, 6'b0}; // ab2左移2位
wire signed [15:0] p3 = {ab3, 5'b0}; // ab3左移3位
wire signed [15:0] p4 = {ab4, 4'b0}; // ab4左移4位
wire signed [15:0] p5 = {ab5, 3'b0}; // ab5左移5位
wire signed [15:0] p6 = {ab6, 2'b0}; // ab6左移6位
wire signed [15:0] p7 = {ab7, 1'b0}; // ab7左移7位
assign z = p0 + p1 + p2 + p3 + p4 + p5 + p6 + p7; // 各位加和
endmodule