c51的中断系统结构图
时间: 2023-10-07 14:05:09 浏览: 34
C51的中断系统结构图如下所示:
```
+------------------+
| IE |
+------------------+
| IP |
+------------------+
| EA |
+------------------+
| ET0 |
+------------------+
| ET1 |
+------------------+
| ES |
+------------------+
| IT0 |
+------------------+
| IT1 |
+------------------+
| PSW |
+------------------+
| P3 |
+------------------+
| P3H |
+------------------+
| SCON |
+------------------+
| TH1 |
+------------------+
| TL1 |
+------------------+
| TH0 |
+------------------+
| TL0 |
+------------------+
```
其中,IE为中断使能寄存器,IP为中断优先级寄存器,EA为全局中断使能位,ET0/ET1/ES为定时器/串口中断使能位,IT0/IT1为外部中断类型控制位,PSW为程序状态字,P3/P3H为外设口3及其高字节寄存器,SCON为串口控制寄存器,TH1/TL1/TH0/TL0为定时器计数器的高/低字节寄存器。