HDBaseT
TM
Specification 2.0
x
2.4 HDSBI Link Layer ............................................................................................................. 74
2.4.1 HDBaseT Stand by Interface (HDSBI) Overview ............................................................. 74
2.4.2 HDSBI Link Start-Up ..................................................................................................... ... 74
2.4.3 HDSBI Packet Format...................................................................................................... 74
2.4.4 Short Packets ........................................................................................................... ....... 76
2.5 Operation Modes ........................................................................................................... 77
2.5.1 Changing Operation Modes ........................................................................................... 77
2.5.2 Operation Mode Hierarchy ............................................................................................ 79
2.5.3 Negotiation for Next Mode of Operation ...................................................................... 79
2.5.4 Preserving Link Continuity for Controls, Management and Ethernet ............................ 82
2.5.5 Operation Mode Negotiation Using HLIC messages ...................................................... 84
3 Physical Layer ................................................................................................................ 88
3.1 General .......................................................................................................................... 88
3.1.1 Physical Media Impairments .......................................................................................... 88
3.2 Downstream Phy ............................................................................................................ 89
3.2.1 Downstream Phy Period ................................................................................................. 89
3.2.2 Variable Bit Rate / Error Resistance Level Symbols ....................................................... 89
3.2.3 Downstream Physical Coding Sub-layer (PCS)................................................................ 90
3.2.4 Downstream Physical interface tests ............................................................................. 96
3.2.5 Downstream Transmitter Electrical Specifications ...................................................... 100
3.2.6 Downstream Receiver Electrical Specifications ........................................................... 102
3.3 Upstream Phy ............................................................................................................... 102
3.3.1 Upstream Phy Period ................................................................................................... 102
3.3.2 Upstream Frame Length ............................................................................................... 103
3.3.3 Upstream Physical Coding Sub-layer (PCS) .................................................................. 103
3.3.4 Upstream Physical Interface Tests ............................................................................... 110
3.3.5 Upstream Transmitter Electrical Specifications ........................................................... 113
3.3.6 Upstream Receiver Electrical Specifications ................................................................ 115
3.4 Active Mode Startup ..................................................................................................... 115
3.4.1 Downstream Link Startup Transmission Types ............................................................ 115
3.4.2 Upstream Link Startup Transmission Types ................................................................. 116
3.4.3 Full Startup ............................................................................................................ ....... 116
3.4.4 Fast Startup ............................................................................................................ ...... 123
3.5 HDBaseT Standby Mode Interface (HDSBI) Phy .............................................................. 130
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