13
DRV2604
www.ti.com.cn
ZHCSE01C –DECEMBER 2012–REVISED MARCH 2018
Copyright © 2012–2018, Texas Instruments Incorporated
Feature Description (continued)
7.3.5.1 PWM Interface
When the DRV2604 device is in PWM interface mode, the device accepts PWM data at the IN/TRIG pin. The
DRV2604 device drives the actuator continuously in PWM interface mode until the user sets the device to
standby mode or to enter another interface mode. In standby mode, the strength of vibration is determined by the
duty cycle.
For the LRA, the DRV2604 device automatically tracks the resonance frequency unless the LRA_OPEN_LOOP
bit in register 0x1D is set. If the LRA_OPEN_LOOP bit is set, the LRA is driven according to the frequency of the
PWM input signal. Specifically, the driving frequency is the PWM frequency divided by 128.
7.3.5.2 Internal Memory Interface
The DRV2604 device is designed with 2 kB of integrated RAM for waveform storage used by the playback
engine. The data is stored in an efficient way (voltage-time pairs) to maximize the number of waveforms that can
be carried. The playback engine also has the ability to generate smooth ramps (up or down) by relying on the
start-waveform and end-waveform points and by using linear interpolation techniques.
Storing waveforms on the DRV2604 device instead of the host processor has several advantages including:
• Offloading processing requirements, such as PWM generation, from the host processor or micro-controller
• Improving latency by storing the waveforms on the DRV2604 device and only requiring a trigger signal
• Reducing I
2
C traffic by eliminating the requirement to transfer waveform data
7.3.5.2.1 Waveform Sequencer
The waveform sequencer queues waveform identifiers for playback. Eight sequence registers queue up to eight
waveforms for sequential playback. A waveform identifier is an integer value referring to the index position of a
waveform in the RAM library. Playback begins at register address 0x04 when the user asserts the GO bit
(register 0x0C). When playback of that waveform ends, the waveform sequencer plays the waveform identifier
held in register 0x05 if the next waveform is non-zero. The waveform sequencer continues in this way until it
reaches an identifier value of zero or until all eight identifiers are played (register addresses 0x04 through 0x0B),
whichever scenario is reached first.
The waveform identifier range is 1 to 127. The MSB of each sequence register can implement a delay between
sequence waveforms. When the MSB is high, bits [6:0] indicate the length of the wait time. The wait time for that
step then becomes WAV_FRM_SEQ[6:0] × 10 ms.
7.3.5.2.2 Library Parameterization
The RAM waveforms are augmented by the time offset registers (registers 0x0D to 0x10). The augmentation
occurs only for the waveforms and not for the other interfaces (such as PWM and RTP). The purpose of the
functionality is to add time stretching (or time shrinking) to the waveform. This functionality is useful for
customizing the entire library of waveforms for a specific actuator rise time and fall time.
The time parameters that can be stretched or shrunk include:
ODT Overdrive time
SPT Sustain positive time
SNT Sustain Negative Time
BRT Brake Time
The time values are additive offsets and are 8-bit signed values. The default offset of the time values is 0.
Positive values add and negative values subtract from the time value of the effect that is currently played. The
most positive value in the waveform is automatically interpreted as the overdrive time, and the most negative
value in the waveform is automatically interpreted as the brake time. The time-offset parameters are applied to
both voltage-time pairs and linear ramps. For linear ramps, linear interpolation is stretched (or shrunk) over the
two operative points for the period (see Equation 1).
t + t
(ofs)
where
• t
(ofs)
is the time offset (1)