![](https://csdnimg.cn/release/download_crawler_static/85524466/bg11.jpg)
TIFS services are complemented by a separate Device Manager (DM) software to supply centralized
Resource Management (RM) and Power Management (PM) services necessary for device configuration. Power
Management services include configuration and control of module power, clock state, frequency, and mux
selection, and system reset. Resource Management services provide allocation and assignment of key SoC-
level resources, including components within the Navigator Subsystem (NavSS) like Unified DMA (UDMA),
PSIL, Ring Accelerator, Interrupt Aggregator and Interrupt Router, as well as all of the various Interrupt
Router instances throughout the SoC. The DM software is integrated as a library on the MCU R5F CPU, and
while TI provides a reference implementation and RTOS-based example integration, the software is otherwise
programmable and must be integrated within the context of other applications running on the same CPU.
TIFS and DM are collectively referred to as the System Firmware (SYSFW) services of the device. The
centralized SYSFW allows peripherals, clocks, and chip-level resources to be accessed by multiple processors
within the SoC. It mitigates many of the key challenges associated with traditional system and security control
as implemented through discrete entities within the system. The services are provided through a common TI
System Control Interface (TISCI) to enable multiple processing entities, referred to as “hosts”, to have access
to the services in an OS-agnostic manner. An overview of the TISCI message format as well a description
of all of the services available can be found here: http://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/
TISCI_header.html.
The SYSFW enables the user to supply an application-specific configuration through the concept of a board
configuration. The board configuration is a pre-defined binary format which the user can customize according to
their system-level needs. This includes, but is not limited to, selecting control of certain fundamental features like
trace logging capabilities, specifying host ownership assignments for resource management and configuration,
and permitting and/or limiting designated hosts for access to security resources. On high-secure devices, the
board configurations are further signed by user keys and authenticated upon reception using the device root
of trust to ensure that only the sanctioned options are used for the configuration. The board configuration
reception itself also acts as a trigger for several other system and module-level initializations. Therefore, many
TISCI APIs require that a valid board configuration is sent before being available to call by requesting hosts.
A full description of the board configuration options can be found from the firmware public documentation: http://
software-dl.ti.com/tisci/esd/latest/3_boardcfg/index.html.
SYSFW defines restrictions on which hosts may access the services directly or indirectly. Any host which is
designated as “secure” in the system, either through native secure execution or via promoted credentials using
the ISC, will send all service request messages to the TIFS firmware directly. Security services will be processed
and responded by TIFS. However, all RM and PM services must be forwarded to DM for processing. In a
similar manner, all non-secure hosts in the system must communicate with DM directly. All RM/PM services are
processed by DM, and all security-related services are forwarded to TIFS for processing. In both scenarios,
TIFS and DM act as proxy requestors on behalf of their original requesting host, and the forwarding between
the entities is performed transparently through the message forwarding agents built into the software. This
complex interaction can be illustrated further by the diagrams shown in the same link listed above for the TISCI
description: http://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/TISCI_header.html.
TIFS and DM are delivered as a part of TI’s Processor SDKs. The TIFS is a provided as a binary-only image,
which on high-secure devices is furthermore signed and encrypted by TI secret keys. As such, the software is
closed from development and is expected to be integrated as a black-box image. TIFS is loaded through the R5
bootloader as part of the default boot sequence in the SDK, and TI provides standard board configuration entries
which are supplied for default configurations to support SDK examples and use-cases.
DM is implemented through a collection of libraries and a reference TISCI server running on the MCU R5F core.
These are all provided through the SCIClient component within the PDK from the Processor SDK RTOS. TI
SDKs provide a prebuilt reference RTOS-based version of DM which is similarly loaded through the standard
device boot procedures. The DM software can be re-integrated into an existing MCU R5F application and may
be optionally ported to another OS foundation as required. For more details, navigate to the SCIClient module
inside the PDK documentation, which is available through the top-level product software download page: https://
www.ti.com/tool/PROCESSOR-SDK-DRA8X-TDA4X/.
DM is developed according to TI’s AP216 FSQ process and is not safety certified. TI provides the necessary
supporting documentation as part of the CSP (Compliance Support Package) to customers to certify the DM.
TIFS is developed according to TI’s AP216 BQ process.
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SPRUIR1 – DECEMBER 2021
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