"16340198孙肖冉数电实验报告：JK触发器异步计数器设计与仿真图分析"

16340198 Sun Xiaoran Digital Experiment Report 1; (2) Simulation diagram: corresponding waveform diagram: from top to bottom are CP-Q0-Q1-Q2-Q3 (1) Function of 74LS194: Right shift simulation diagram: corresponding waveform diagram from top to bottom corresponds to CP, Q0, Q1, Q2, Q; "Digital Circuits and Logic Design" Experimental Report of the class Education Three Class College School of Data Science and Computer Science Student Number 16340198 Student Name Sun Xiaoran December 6, 2017 1. Purpose of the Experiment Familiarize with the logical function of J-K flip-flops and master the asynchronous counter and synchronous counter composed of J-K flip-flops. 2. Experimental Instruments and Devices 1. Experimental box, multimeter, oscilloscope 2. 74LS73, 74LS00, 74LS08, 74LS20 3. Experimental Content 1. Design a 16-bit hexadecimal asynchronous adder using JK flip-flops, and observe and record the CP and waveform output of each bit with a logic analyzer. (1) Design process: State table of 16-bit addition counter: Q3Q2Q1Q00000000100100011010001010110011110001001101010111100110111101111 Asynchronous counter, 4 JK flip-flops are not the same clock signal, when Qi goes from 1 to 0, carry out the flip to achieve carry; we change the next flip-flop clock signal by changing (J, K are both 1; ".