第四版全面升级：数字逻辑设计涵盖新主题与应用

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6 Digital logic design

Subtraction

The rules for subtraction are summarised in Figure 1.3 and the subtraction of two 4-bit

positive numbers, where the

subtrahend

is less than the

minuend,

is illustrated in the

following example:

2 3 2 2

21 2 0

Minuend 1 1 0 0 12

Subtrahend 0 0 1 1 -3

Difference 1 0 0 1 +9

.1,"/"

Borrows 1 1

Minuend Subtrahend

0 0

0 1

1 0

1 1

Difference Borrow

0 0

1 1

1 0

0 0

Figure 1.3

Rules for the subtraction of two binary

digits

2 3 2 2

21 2 0

If the subtrahend is greater than the

minuend an

arithmetic underflow

occurs

which results in a borrow-out at the most

significant bit and the difference is negative

in this case. The borrow-out can be used in

a digital machine to set a 1-bit register and

in doing so will indicate that the difference

is negative. Arithmetic underflow is illus-

trated by the following example:

Minuend 0 0 1 1

Subtrahend 1 1 0 0 -12

Difference 0 1 1 1

.,,/i,,,

Borrows 1 1

-9

Subtraction is commonly used in a digital machine that performs numerical computa-

tions, for comparing the magnitude of two binary numbers. If arithmetic underflow

occurs the borrow out indicates that the subtrahend is greater than the minuend.

Otherwise the two numbers are either equal or the minuend is greater than the subtrahend.

1.5 Signed arithmetic

The previous section has dealt with positive numbers and only in the case where the

subtrahend is greater than the minuend is the answer negative. It is important that

there should be a distinction made between positive and negative numbers in

a machine. A

sign digit

can be used to provide this distinction. A negative number is

identified by a 1 that appears in the most significant bit (MSB) position whilst

a positive number is identified by a 0 in that position, so that:

(-23)10

= (1,0010111)2

(-0)~0 = (1,0000000)2

(+23)10 = (0, O010111)2

(+O)lo = (0, 0000000)2

Number systems and codes 7

....

This is termed

signed magnitude

representation. The range of numbers available

with an 8-bit signed integer is from -127 to + 127 with two possible representations

for zero.

Because the design of a logic circuit capable of numerical computation in signed

magnitude representation is somewhat complex it is rarely used. In practice, numerical

computation in a machine is performed using

complement arithmetic.

1.6 Complement arithmetic

This is a powerful yet simple technique which minimises the hardware implemen-

tation of signed arithmetic operations in a digital machine. In practice, when using

complement arithmetic, the process of subtraction becomes one of addition.

In any number system two complements are available. In the binary system they are

(a) the

2's complement

radix complement,

and (b)

1 's complement

diminished radix

complement.

For the decimal system they are: (a) the

1O's complement

radix com-

plement

and (b) the

9's complement

diminished radix complement.

It is worth noting

that the use of the l's complement in the binary system raises certain hardware

implementation difficulties so that signed arithmetic processes are invariably per-

formed using 2's complement notation.

1.7 Complement representation for binary numbers

The 2's complement of a binary number X is defined by the equation

IX ]2 -"

2" - X

where

[X]2

is the 2's complement representation and n is the number of binary digits

contained in X. For X = 1010 and n = 4 the 2's complement is given by:

IX]2 -~

2 4-

1010

= 10000- 1010

--0110

Two other methods are available for determining the 2's complement of X. In the

first method, all the digits are inverted and a 1 is added in the least significant place.

For the second method, the lowest order 1 in X is sensed, and all succeeding higher

digits are inverted. Examples of these two methods follow:

Method 1 Method 2

X= 1010 X = 1010

0101 Invert /

Invert Sense

1 Add

[X]2 =0110

[X]2 = O110

Digital logic design

_ w

Assuming X - 1010 and X - 0101 then the sum of X, X and 1 is

1010 X

0101 X

10000

and the underlined digit in this sum has the significance of 2" and it has been shown

that X + X + 1 - 2 n as required.

1.9 Offset binary representation

This representation is useful in some applications, for example analogue-to-digital

conversion and floating point arithmetic. Here the natural binary code is offset

Decimal

number

Offset

binary

1,111

1,110

1,101

1,100

1,011

1,010

1,001

1,000

Decimal

number

-1

-2

-3

-4

-5

-6

-7

-8

Offset

binary

0,111

0,110

0,101

0,100

0,011

0,010

0,001

o,ooo

Figure 1.6 Tabular representation of 4-bit offset

binary numbers

by shifting its origin to the most negative

number in the range so that (0)~o occurs near

the mid-point of the range. For positive

numbers the sign bit is 1 and for negative

numbers it is 0. Hence"

(+6)10 = (1, 110)2 (-6)10 = (0, 010)2

A tabulation for excess binary in the range

(-8)10 to (+7)10 is given in Figure 1.6.

In the four representations described,

with the exception of offset binary, positive

numbers remain unchanged when signed.

1.10 Addition and subtraction of 2's complement numbers

Addition and subtraction in the 2's complement system are both carried out as

additions. Subtrahends are regarded as negative numbers and are converted to their

2's complement form. They are then added to the positive minuend. When adding

two negative numbers they are both converted to their 2's complement form before

addition takes place. Six possible cases are considered for the addition and subtraction

of two 8-bit numbers where the MSB represents the sign digit and is given a negative

weighting of 27 .

Case

< +127

Addition of two 8-bit numbers both of which are positive and whose sum is

_27 26

0, 0

2 5 2 4 2 3

22 21 20

1 0 1 1 0 0

1 1 0 1 0 0

1 0 0 0 0 0

+44

+52

+96

Correct positive answer

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