TMS320F280049C微控制器：详解关键特性和功能

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DSP280049C数据手册是一份详细介绍TI公司TMS320F28004x系列32位微控制器的详细规格和技术文档。该芯片主要特点如下： 1. **高性能CPU**: 芯片内置一个100MHz的TMS320C28x CPU，具备单精度浮点单元(FPU)和三角法数学单元(TMU)，能够优化三角函数运算，从3倍周期提升到4倍周期，提高了软件性能。 2. **数学和算法加速**: 提供13周期的派克变换以及Viterbi/复杂数学单元(VCU-I)，支持硬件断点，包括错误恢复加速器(ERAD)，可实现高效算法处理。 3. **可编程控制律加速器(CLA)**: 具有独立于主CPU执行的100MHz FPU，执行独立代码，为特殊应用提供定制化的控制逻辑加速。 4. **大容量存储器**: 包括256KB闪存和100KB RAM，支持ECC保护和奇偶校验，具备双区安全机制和唯一标识(UID)功能，便于安全和定制开发。 5. **时钟与系统管理**: 内置两个10MHz振荡器，支持内部晶振和外部时钟输入，还有窗口化看门狗计时器和低电压复位电路，确保系统的稳定性和可靠性。 6. **丰富的外设接口**：包含6通道DMA控制器、40个GPIO引脚、21路模拟输入、ePIE模块、多个LPM模式支持，以及多种通信接口如PMBus、I2C、CAN、SPI、SCI、LIN和FSI，满足多协议通信需求。 7. **模拟和数字系统**: 配备三个3.45MSPS 12位ADC，最多21个外部通道，每个ADC带有四个后处理块和七个窗口比较器，支持数字干扰滤波和高精度模拟信号处理。 8. **高级控制外设**: 提供16个ePWM通道，具有高分辨率和集成死区支持，以及集成硬件跳变区域(TZ)和七个增强型控制功能。 TMS320F280049C是一款功能强大且高度灵活的微控制器，适用于工业控制、信号处理、通信系统等多种应用场景，其强大的计算能力、丰富的外设资源以及高级的模拟处理技术使其成为高性能嵌入式解决方案的理想选择。

表 6-1. Pin Attributes (continued)

SIGNAL NAME

MUX

POSITION

100 PZ

PMQ

64 PM

RSH

TYPE

DESCRIPTION

19 12 12 10

I ADC-C Input 0

CMP1_HP1 I CMPSS-1 High Comparator Positive Input 1

CMP1_HN1 I CMPSS-1 High Comparator Negative Input 1

CMP1_LP1 I CMPSS-1 Low Comparator Positive Input 1

CMP1_LN1 I CMPSS-1 Low Comparator Negative Input 1

AIO237 I Digital Input-237 on ADC Pin

29 18 18 16

I ADC-C Input 1

CMP2_HP1 I CMPSS-2 High Comparator Positive Input 1

CMP2_HN1 I CMPSS-2 High Comparator Negative Input 1

CMP2_LP1 I CMPSS-2 Low Comparator Positive Input 1

CMP2_LN1 I CMPSS-2 Low Comparator Negative Input 1

AIO238 I Digital Input-238 on ADC Pin

C14

I ADC-C Input 14

CMP7_HP1 I CMPSS-7 High Comparator Positive Input 1

CMP7_HN1 I CMPSS-7 High Comparator Negative Input 1

CMP7_LP1 I CMPSS-7 Low Comparator Positive Input 1

CMP7_LN1 I CMPSS-7 Low Comparator Negative Input 1

AIO246 I Digital Input-246 on ADC Pin

21 13 13 11

I ADC-C Input 2

CMP3_HP1 I CMPSS-3 High Comparator Positive Input 1

CMP3_HN1 I CMPSS-3 High Comparator Negative Input 1

CMP3_LP1 I CMPSS-3 Low Comparator Positive Input 1

CMP3_LN1 I CMPSS-3 Low Comparator Negative Input 1

AIO244 I Digital Input-244 on ADC Pin

31 19 19 17

I ADC-C Input 3

CMP4_HP1 I CMPSS-4 High Comparator Positive Input 1

CMP4_HN1 I CMPSS-4 High Comparator Negative Input 1

CMP4_LP1 I CMPSS-4 Low Comparator Positive Input 1

CMP4_LN1 I CMPSS-4 Low Comparator Negative Input 1

AIO245 I Digital Input-245 on ADC Pin

17 11 11

I ADC-C Input 4

CMP5_HP1 I CMPSS-5 High Comparator Positive Input 1

CMP5_HN1 I CMPSS-5 High Comparator Negative Input 1

CMP5_LP1 I CMPSS-5 Low Comparator Positive Input 1

CMP5_LN1 I CMPSS-5 Low Comparator Negative Input 1

AIO239 I Digital Input-239 on ADC Pin

I ADC-C Input 5

CMP6_HP1 I CMPSS-6 High Comparator Positive Input 1

CMP6_HN1 I CMPSS-6 High Comparator Negative Input 1

CMP6_LP1 I CMPSS-6 Low Comparator Positive Input 1

CMP6_LN1 I CMPSS-6 Low Comparator Negative Input 1

AIO240 I Digital Input-240 on ADC Pin

PGA1_GND 14 10 10 9 I PGA-1 Ground

PGA1_IN

18 12 12 10

I PGA-1 Input

CMP1_HP2 I CMPSS-1 High Comparator Positive Input 2

CMP1_LP2 I CMPSS-1 Low Comparator Positive Input 2

TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,

TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C

ZHCSGY3F – JANUARY 2017 – REVISED FEBRUARY 2021

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Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C

TMS320F280045 TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C

表 6-1. Pin Attributes (continued)

SIGNAL NAME

MUX

POSITION

100 PZ

PMQ

64 PM

RSH

TYPE

DESCRIPTION

PGA2_GND 32 20 20 18 I PGA-2 Ground

PGA2_IN

30 18 18 16

I PGA-2 Input

CMP2_HP2 I CMPSS-2 High Comparator Positive Input 2

CMP2_LP2 I CMPSS-2 Low Comparator Positive Input 2

PGA3_GND 15 10 10 9 I PGA-3 Ground

PGA3_IN

20 13 13 11

I PGA-3 Input

CMP3_HP2 I CMPSS-3 High Comparator Positive Input 2

CMP3_LP2 I CMPSS-3 Low Comparator Positive Input 2

PGA4_GND 32 20 20 18 I PGA-4 Ground

PGA4_IN

31 19 19 17

I PGA-4 Input

CMP4_HP2 I CMPSS-4 High Comparator Positive Input 2

CMP4_LP2 I CMPSS-4 Low Comparator Positive Input 2

PGA5_GND 13 10 10 9 I PGA-5 Ground

PGA5_IN

16 11 11

I PGA-5 Input

CMP5_HP2 I CMPSS-5 High Comparator Positive Input 2

CMP5_LP2 I CMPSS-5 Low Comparator Positive Input 2

PGA6_GND 32 20 20 18 I PGA-6 Ground

PGA6_IN

I PGA-6 Input

CMP6_HP2 I CMPSS-6 High Comparator Positive Input 2

CMP6_LP2 I CMPSS-6 Low Comparator Positive Input 2

PGA7_GND 42 I PGA-7 Ground

PGA7_IN

I PGA-7 Input

CMP7_HP2 I CMPSS-7 High Comparator Positive Input 2

CMP7_LP2 I CMPSS-7 Low Comparator Positive Input 2

VREFHIA 25 16 16 14 I/O

ADC-A High Reference. In external reference mode,

externally drive the high reference voltage onto this pin. In

internal reference mode, a voltage is driven onto this pin by

the device. In either mode, place at least a 2.2-µF capacitor

on this pin. This capacitor should be placed as close to the

device as possible between the VREFHIA and VREFLOA

pins. Do not load this pin externally in either internal or

external reference mode.

VREFHIB 24 16 16 14 I/O

ADC-B High Reference. In external reference mode,

externally drive the high reference voltage onto this pin. In

internal reference mode, a voltage is driven onto this pin by

the device. In either mode, place at least a 2.2-µF capacitor

on this pin. This capacitor should be placed as close to the

device as possible between the VREFHIB and VREFLOB

pins. Do not load this pin externally in either internal or

external reference mode.

VREFHIC 24 16 16 14 I/O

ADC-C High Reference. In external reference mode,

externally drive the high reference voltage onto this pin. In

internal reference mode, a voltage is driven onto this pin by

the device. In either mode, place at least a 2.2-µF capacitor

on this pin. This capacitor should be placed as close to the

device as possible between the VREFHIC and VREFLOC

pins. Do not load this pin externally in either internal or

external reference mode.

VREFLOA 27 17 17 15 I ADC-A Low Reference

VREFLOB 26 17 17 15 I ADC-B Low Reference

VREFLOC 26 17 17 15 I ADC-C Low Reference

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TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,

TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C

ZHCSGY3F – JANUARY 2017 – REVISED FEBRUARY 2021

Submit Document Feedback

Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C

TMS320F280045 TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C

表 6-1. Pin Attributes (continued)

SIGNAL NAME

MUX

POSITION

100 PZ

PMQ

64 PM

RSH

TYPE

DESCRIPTION

GPIO

GPIO0 0, 4, 8, 12

79 52 52 47

I/O General-Purpose Input Output 0

EPWM1_A 1 O ePWM-1 Output A

I2CA_SDA 6 I/OD I2C-A Open-Drain Bidirectional Data

GPIO1 0, 4, 8, 12

78 51 51 46

I/O General-Purpose Input Output 1

EPWM1_B 1 O ePWM-1 Output B

I2CA_SCL 6 I/OD I2C-A Open-Drain Bidirectional Clock

GPIO2 0, 4, 8, 12

77 50 50 45

I/O General-Purpose Input Output 2

EPWM2_A 1 O ePWM-2 Output A

OUTPUTXBAR1 5 O Output X-BAR Output 1

PMBUSA_SDA 6 I/OD PMBus-A Open-Drain Bidirectional Data

SCIA_TX 9 O SCI-A Transmit Data

FSIRXA_D1 10 I FSIRX-A Optional Additional Data Input

GPIO3 0, 4, 8, 12

76 49 49 44

I/O General-Purpose Input Output 3

EPWM2_B 1 O ePWM-2 Output B

OUTPUTXBAR2 2, 5 O Output X-BAR Output 2

PMBUSA_SCL 6 I/OD PMBus-A Open-Drain Bidirectional Clock

SPIA_CLK 7 I/O SPI-A Clock

SCIA_RX 9 I SCI-A Receive Data

FSIRXA_D0 10 I FSIRX-A Primary Data Input

GPIO4 0, 4, 8, 12

75 48 48 43

I/O General-Purpose Input Output 4

EPWM3_A 1 O ePWM-3 Output A

OUTPUTXBAR3 5 O Output X-BAR Output 3

CANA_TX 6 O CAN-A Transmit

FSIRXA_CLK 10 I FSIRX-A Input Clock

GPIO5 0, 4, 8, 12

89 61 61 55

I/O General-Purpose Input Output 5

EPWM3_B 1 O ePWM-3 Output B

OUTPUTXBAR3 3 O Output X-BAR Output 3

CANA_RX 6 I CAN-A Receive

SPIA_STE 7 I/O SPI-A Slave Transmit Enable (STE)

FSITXA_D1 9 O FSITX-A Optional Additional Data Output

GPIO6 0, 4, 8, 12

97 64 64 1

I/O General-Purpose Input Output 6

EPWM4_A 1 O ePWM-4 Output A

OUTPUTXBAR4 2 O Output X-BAR Output 4

SYNCOUT 3 O External ePWM Synchronization Pulse

EQEP1_A 5 I eQEP-1 Input A

CANB_TX 6 O CAN-B Transmit

SPIB_SOMI 7 I/O SPI-B Slave Out, Master In (SOMI)

FSITXA_D0 9 O FSITX-A Primary Data Output

GPIO7 0, 4, 8, 12

84 57 57 52

I/O General-Purpose Input Output 7

EPWM4_B 1 O ePWM-4 Output B

OUTPUTXBAR5 3 O Output X-BAR Output 5

EQEP1_B 5 I eQEP-1 Input B

CANB_RX 6 I CAN-B Receive

SPIB_SIMO 7 I/O SPI-B Slave In, Master Out (SIMO)

FSITXA_CLK 9 O FSITX-A Output Clock

TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,

TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C

ZHCSGY3F – JANUARY 2017 – REVISED FEBRUARY 2021

www.ti.com.cn

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Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C

TMS320F280045 TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C

表 6-1. Pin Attributes (continued)

SIGNAL NAME

MUX

POSITION

100 PZ

PMQ

64 PM

RSH

TYPE

DESCRIPTION

GPIO8 0, 4, 8, 12

74 47 47 42

I/O General-Purpose Input Output 8

EPWM5_A 1 O ePWM-5 Output A

CANB_TX 2 O CAN-B Transmit

ADCSOCAO 3 O

ADC Start of Conversion A Output for External ADC (from

ePWM modules)

EQEP1_STROBE 5 I/O eQEP-1 Strobe

SCIA_TX 6 O SCI-A Transmit Data

SPIA_SIMO 7 I/O SPI-A Slave In, Master Out (SIMO)

I2CA_SCL 9 I/OD I2C-A Open-Drain Bidirectional Clock

FSITXA_D1 10 O FSITX-A Optional Additional Data Output

GPIO9 0, 4, 8, 12

90 62 62 56

I/O General-Purpose Input Output 9

EPWM5_B 1 O ePWM-5 Output B

SCIB_TX 2 O SCI-B Transmit Data

OUTPUTXBAR6 3 O Output X-BAR Output 6

EQEP1_INDEX 5 I/O eQEP-1 Index

SCIA_RX 6 I SCI-A Receive Data

SPIA_CLK 7 I/O SPI-A Clock

FSITXA_D0 10 O FSITX-A Primary Data Output

GPIO10 0, 4, 8, 12

93 63 63

I/O General-Purpose Input Output 10

EPWM6_A 1 O ePWM-6 Output A

CANB_RX 2 I CAN-B Receive

ADCSOCBO 3 O

ADC Start of Conversion B Output for External ADC (from

ePWM modules)

EQEP1_A 5 I eQEP-1 Input A

SCIB_TX 6 O SCI-B Transmit Data

SPIA_SOMI 7 I/O SPI-A Slave Out, Master In (SOMI)

I2CA_SDA 9 I/OD I2C-A Open-Drain Bidirectional Data

FSITXA_CLK 10 O FSITX-A Output Clock

GPIO11 0, 4, 8, 12

52 31 31 28

I/O General-Purpose Input Output 11

EPWM6_B 1 O ePWM-6 Output B

SCIB_RX 2, 6 I SCI-B Receive Data

OUTPUTXBAR7 3 O Output X-BAR Output 7

EQEP1_B 5 I eQEP-1 Input B

SPIA_STE 7 I/O SPI-A Slave Transmit Enable (STE)

FSIRXA_D1 9 I FSIRX-A Optional Additional Data Input

GPIO12 0, 4, 8, 12

51 30 27

I/O General-Purpose Input Output 12

EPWM7_A 1 O ePWM-7 Output A

CANB_TX 2 O CAN-B Transmit

EQEP1_STROBE 5 I/O eQEP-1 Strobe

SCIB_TX 6 O SCI-B Transmit Data

PMBUSA_CTL 7 I PMBus-A Control Signal

FSIRXA_D0 9 I FSIRX-A Primary Data Input

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TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,

TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C

ZHCSGY3F – JANUARY 2017 – REVISED FEBRUARY 2021

Submit Document Feedback

Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C

TMS320F280045 TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C

表 6-1. Pin Attributes (continued)

SIGNAL NAME

MUX

POSITION

100 PZ

PMQ

64 PM

RSH

TYPE

DESCRIPTION

GPIO13 0, 4, 8, 12

50 29 26

I/O General-Purpose Input Output 13

EPWM7_B 1 O ePWM-7 Output B

CANB_RX 2 I CAN-B Receive

EQEP1_INDEX 5 I/O eQEP-1 Index

SCIB_RX 6 I SCI-B Receive Data

PMBUSA_ALERT 7 I/OD PMBus-A Open-Drain Bidirectional Alert Signal

FSIRXA_CLK 9 I FSIRX-A Input Clock

GPIO14 0, 4, 8, 12

I/O General-Purpose Input Output 14

EPWM8_A 1 O ePWM-8 Output A

SCIB_TX 2 O SCI-B Transmit Data

OUTPUTXBAR3 6 O Output X-BAR Output 3

PMBUSA_SDA 7 I/OD PMBus-A Open-Drain Bidirectional Data

SPIB_CLK 9 I/O SPI-B Clock

EQEP2_A 10 I eQEP-2 Input A

GPIO15 0, 4, 8, 12

I/O General-Purpose Input Output 15

EPWM8_B 1 O ePWM-8 Output B

SCIB_RX 2 I SCI-B Receive Data

OUTPUTXBAR4 6 O Output X-BAR Output 4

PMBUSA_SCL 7 I/OD PMBus-A Open-Drain Bidirectional Clock

SPIB_STE 9 I/O SPI-B Slave Transmit Enable (STE)

EQEP2_B 10 I eQEP-2 Input B

GPIO16 0, 4, 8, 12

54 33 33 30

I/O General-Purpose Input Output 16

SPIA_SIMO 1 I/O SPI-A Slave In, Master Out (SIMO)

CANB_TX 2 O CAN-B Transmit

OUTPUTXBAR7 3 O Output X-BAR Output 7

EPWM5_A 5 O ePWM-5 Output A

SCIA_TX 6 O SCI-A Transmit Data

SD1_D1 7 I SDFM-1 Channel 1 Data Input

EQEP1_STROBE 9 I/O eQEP-1 Strobe

PMBUSA_SCL 10 I/OD PMBus-A Open-Drain Bidirectional Clock

XCLKOUT 11 O

External Clock Output. This pin outputs a divided-down

version of a chosen clock signal from within the device.

GPIO17 0, 4, 8, 12

55 34 34 31

I/O General-Purpose Input Output 17

SPIA_SOMI 1 I/O SPI-A Slave Out, Master In (SOMI)

CANB_RX 2 I CAN-B Receive

OUTPUTXBAR8 3 O Output X-BAR Output 8

EPWM5_B 5 O ePWM-5 Output B

SCIA_RX 6 I SCI-A Receive Data

SD1_C1 7 I SDFM-1 Channel 1 Clock Input

EQEP1_INDEX 9 I/O eQEP-1 Index

PMBUSA_SDA 10 I/OD PMBus-A Open-Drain Bidirectional Data

TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,

TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C

ZHCSGY3F – JANUARY 2017 – REVISED FEBRUARY 2021

www.ti.com.cn

20 Submit Document Feedback

Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C

TMS320F280045 TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C

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