ARM架构手册：技术解析与应用

需积分: 10 190 浏览量更新于2024-07-23 收藏 5.47MB PDF 举报

"ARM_architecture.pdf 是一份关于ARM架构的参考手册，涵盖了ARM处理器体系结构、汇编语言以及在Linux系统（如Redhat和CentOS）中的应用。文档由ARM Limited发布并保留所有权利，可能包括多次修订版。" ARM架构是全球广泛使用的微处理器架构，尤其在嵌入式系统和移动设备中占据了主导地位。这份名为“ARM Architecture Reference Manual”的文档详细介绍了ARM处理器的内部工作原理、指令集和编程模型。手册中可能包含了以下几个关键知识点： 1. **ARM指令集**：ARM架构以其精简指令集计算（RISC）设计闻名，提供了高效能与低功耗的平衡。文档会深入讲解ARM指令集，包括数据处理、分支、浮点运算、加载/存储等指令。 2. **处理器模式**：ARM处理器支持多种运行模式，如用户模式、系统模式、中断模式等，这些模式用于不同的操作和权限级别。 3. **寄存器组织**：ARM处理器有多个通用寄存器和专用寄存器，每个都有特定的功能，如程序计数器（PC）、链接寄存器（LR）和状态寄存器（CPSR）。 4. **Thumb指令集**：Thumb是ARM的一个16位变体，提供了更紧凑的代码，适合内存受限的环境。 5. **异常和中断处理**：文档会解释如何处理系统中的异常和中断事件，以及相应的处理器状态转换。 6. **冯·诺依曼和哈佛架构**：虽然ARM通常采用哈佛架构，即数据和指令存储空间分开，但某些版本可能也支持冯·诺依曼架构。 7. **软件开发工具**：对于在Linux环境下（如RHEL和CentOS）使用ARM的开发者，文档可能会介绍调试工具、编译器和模拟器，如ARMulator、Embedded ICE和ModelGen。 8. **系统级功能**：ARM处理器支持多种系统接口，如AMBA（Advanced Microcontroller Bus Architecture）总线协议，用于片上系统（SoC）设计中的互连。 9. **多核与并行处理**：随着多核处理器的发展，文档可能包含有关如何在多核环境中进行并行编程的信息。 10. **实时操作系统（RTOS）支持**：由于ARM在嵌入式系统中的广泛应用，手册可能讨论了与RTOS集成的相关内容，如中断服务例程和实时性能。这份手册是开发、调试和优化基于ARM处理器的系统的关键参考资料，无论你是硬件设计师还是软件工程师，都能从中获得深入的理解和实用的知识。

Preface

• The restriction that multiplication destination registers should be different from their source registers

is removed in ARMv6.

• In ARMv5, the

LDM

(2) and

STM

(2) ARM instructions have restrictions on the use of banked registers

by the immediately following instruction. These restrictions are removed from ARMv6.

• The rules determining which PSR bits are updated by an

MSR

instruction are clarified and extended to

cover the new PSR bits defined in ARMv6.

• In ARMv5, the Thumb

MOV

instruction behavior varies according to the registers used (see note). Two

changes are made in ARMv6.

— The restriction about the use of low register numbers in the

MOV

(3) instruction encoding is

removed.

— In order to make the new side-effect-free

MOV

instructions available to the assembler language

programmer without changing the meaning of existing assembler sources, a new assembler

syntax

CPY Rd,Rn

is introduced. This always assembles to the

MOV

(3) instruction regardless of

whether Rd and Rn are high or low registers.

Note

In ARMv5, the Thumb

MOV Rd,Rn

instructions have the following properties:

• If both Rd and Rn are low registers, the instruction is the

MOV

(2) instruction. This instruction sets the

N and Z flags according to the value transferred, and sets the C and V flags to 0.

• If either Rd or Rn is a high register, the instruction is the

MOV

(3) instruction. This instruction leaves

the condition flags unchanged.

This situation results in behavior that varies according to the registers used. The

MOV

(2) side-effects also limit

compiler flexibility on use of pseudo-registers in a global register allocator.

Naming of ARM/Thumb architecture versions

To name a precise version and variant of the ARM/Thumb architecture, the following strings are

concatenated:

1. The string

ARMv

2. The version number of the ARM instruction set.

3. Variant letters of the included variants.

4. In addition, the letter P is used after x to denote the exclusion of several instructions in the

ARMv5TExP variant.

The table Architecture versions on page xvii lists the standard names of the current (not obsolete)

ARM/Thumb architecture versions described in this manual. These names provide a shorthand way of

describing the precise instruction set implemented by an ARM processor. However, this manual normally

uses descriptive phrases such as T variants of architecture version 4 and above to avoid the use of lists of

architecture names.

Preface

Part B - Memory and System Architectures

Part B describes standard memory system features that are normally implemented by the System Control

coprocessor (coprocessor 15) in an ARM-based system. It contains the following chapters:

Chapter B1 Gives a brief overview of this part of the manual.

Chapter B2 The memory order model.

Chapter B3 Gives a general description of the System Control coprocessor and its use.

Chapter B4 Describes the standard ARM memory and system architecture based on the use of a Virtual

Memory System Architecture (VMSA) based on a Memory Management Unit (MMU).

Chapter B5 Gives a description of the simpler Protected Memory System Architecture (PMSA) based on

a Memory Protection Unit (MPU).

Chapter B6 Gives a description of the standard ways to control caches and write buffers in ARM

memory systems. This chapter is relevant both to systems based on an MMU and to systems

based on an MPU.

Chapter B7 Describes the Tightly Coupled Memory (TCM) architecture option for level 1 memory.

Chapter B8 Describes the Fast Context Switch Extension and Context ID support (ARMv6 only).

Part C - Vector Floating-point Architecture

Part C describes the Vector Floating-point (VFP) architecture. This is a coprocessor extension to the ARM

architecture designed for high floating-point performance on typical graphics and DSP algorithms.

Chapter C1 Gives a brief overview of the VFP architecture and information about its compliance with

the IEEE 754-1985 floating-point arithmetic standard.

Chapter C2 Describes the floating-point formats supported by the VFP instruction set, the floating-point

general-purpose registers that hold those values, and the VFP system registers.

Chapter C3 Describes the VFP coprocessor instruction set, organized by type of instruction.

Chapter C4 Contains detailed reference material on the VFP coprocessor instruction set, organized

alphabetically by instruction mnemonic.

Chapter C5 Contains detailed reference material on the addressing modes used by VFP instructions.

One of these is a traditional addressing mode, generating addresses for load/store

instructions. The remainder specify how the floating-point general-purpose registers and

instructions can be used to hold and perform calculations on vectors of floating-point values.

剩余1137页未读，继续阅读

chenzhengping

粉丝: 0
资源: 3

ARM架构手册：技术解析与应用

DEN0024A_v8_architecture_PG.pdf

IHI0048B_b_gic_architecture_specification_v2.pdf

DDI0406C_C_arm_architecture_reference_manual.pdf

arm_cortexM4l_math.lib和arm_cortexM3l_math.lib的区别

keil.arm_compiler.1.6.3

arm_sve.h报错

linux下arm_neon.h文件在那个路径下

keil.arm_compiler.1.7.0.pack

codeblocks中无法inculude arm_neon.h

最新资源