PCD2112用户手册：串行总线脉冲控制LSI

需积分: 10 2 浏览量更新于2024-07-31 收藏 731KB PDF 举报

"PCD2112用户手册.pdf" 该文档是关于PCD2112脉冲控制芯片的用户手册，由Nippon Pulse Motor Co., Ltd.编写。此LSI芯片主要用于通过一个4线串行总线接口与CPU进行通信，作为一个脉冲发生器。手册的目的是帮助用户熟悉PCD2112的功能和操作。手册包含了以下关键内容： 1. **引言（Preface）**：感谢用户选择使用PCD2112串行总线脉冲控制LSI，并提醒用户在使用前应仔细阅读手册以了解产品。 2. **注意事项（Precautions）**： - 未经事先书面许可，禁止全部或部分复制、传输本手册。 - 为提高产品性能或质量，手册中的规格可能会在无预先通知的情况下变更。 - 手册制作虽已尽力确保准确，但如有疑问、错误或遗漏，请及时联系厂商。 - 日本脉冲电机公司不对因使用本手册而导致的任何结果负责，即使在报告了问题或错误后。 3. **终端和信号名称**：手册中以井字号(#)开头的终端和信号名称表示它们使用负逻辑。 4. **处理预防措施（Handling Precautions）**：这部分可能包含有关如何正确安装和操作PCD2112的详细信息，包括安全指南和操作步骤。虽然在提供的内容中没有详细列出，但通常会涵盖电气连接、接地、防静电措施等重要事项。 5. **技术规格**：手册可能提供了PCD2112的详细技术参数，如工作电压、电流消耗、脉冲频率范围、串行总线协议、引脚配置等。 6. **应用示例**：为了帮助用户理解如何在实际系统中使用PCD2112，手册可能包含了一些应用示例和电路图。 7. **故障排除**：提供了解决使用过程中可能出现的问题的指南，帮助用户诊断和修复故障。 8. **编程和配置**：如果PCD2112支持编程或配置，手册将详细介绍如何进行设置和修改参数。 9. **支持和服务**：手册可能还包括供应商的联系方式，以便用户在遇到问题时寻求技术支持或售后服务。 PCD2112用户手册是全面了解和有效利用这款脉冲控制LSI芯片的重要参考资料，涵盖了从基本操作到高级应用的广泛内容。

DA70115-1/2E

- 9 -

Note: The table above shows the signals classified according to their functions. Some terminals have

multiple functions and therefore the same terminal numbers appear more than once.

3-2. Terminal functions in each system mode

The functions of the following terminal depend on the mode selected.

Connected to a CPU Stand alone operation

Pulse train output

Excitation

sequence output

Pulse train output

Excitation sequence

output

System

mode

Terminal

name

Terminal

function

I/O

Terminal

function

I/O

Terminal

function

I/O

Terminal

function

I/O

5 MODE (LOW) I (LOW) I (HIGH) I (HIGH) I

33 MTYP (LOW) I (HIGH) I (LOW) I (HIGH) I

40 SCK I I O O

35 DI I I O O

36 DO O O I I

38 #CS I I

(Same as

#CSO)

(Same as

#CSO)

44 A0/PS0 A0 I A0 I PS0 I PS0 I

45 A1/PS1 A1 I A1 I PS1 I PS1 I

46 PS2 Note 3 I Note 3 I PS2 I PS2 I

47 PS3 Note 3 I Note 3 I PS3 I PS3 I

48 PS4 Note 3 I Note 3 I PS4 I PS4 I

1 P0 P0 I/O P0 I/O Note 3 O Note 3 O

2 P1 P1 I/O P1 I/O Note 3 O Note 3 O

24 UB (LOW) I UB I (LOW) I UB I

23 INP/FH INP I FH I INP I FH I

26 OUT/PH1 OUT O PH1 O OUT O PH1 O

27 DIR/PH2 DIR O PH2 O DIR O PH2 O

28 P2/PH3 P2 O PH3 O Note 3 O PH3 O

29 P3/PH4 P3 O PH4 O Note 3 O PH4 O

Note 1: Empty cells simply mean that the function of these terminals is the same as described in the

terminal name chart. Multiple names in the terminal name chart means that the terminal

function can be selected by the software.

Note 2: LOW and HIGH refer to level applied to the input terminals.

Note 3. Pull these terminals down (5 k to 10 k-ohm resistor).

DA70115-1/2E

- 11 -

3-3-5. #INT [4]

This is an output terminal for an interrupt request signal sent to the CPU. It goes LOW when an interrupt

condition occurs.

It is an open-drain output so it can be wired-OR connection. However, an external pull up resistor (5 K to 10

K ohms) is always needed.

Use bits 22 to 16 of the RENV2 register to set the interrupt conditions. The #INT signal can also be output

when an abnormal stop is caused by the ±#EL signal, STP signal, etc., or when deceleration stop and

immediate stop commands are received, or when a deceleration start or start from an external signal is

performed.

3-3-6. #SCK [40], DI [35], DO [36], #CS [38], #CSO [34]

These are the serial communication terminals.

Setting

Terminal name

MODE = LOW (Connected to a CPU)

MODE = HIGH (Stand alone

operation)

#SCK

Input for a synchronous clock serial

signal.

Outputs a synchronous clock serial

signal.

DI Serial input signal Serial output signal

DO Serial output signal Serial input signal

#CS Chip select input

Outputs a signal the same as CS0.

See the Note

#CSO

Chip select output to the EEPROM.

(When you need to control both the PCD and EEPROM from the CPU through

a single CS signal line.) See the Note

Note: May be left open if not used.

3-3-7. PA/PDR [9], PB/MDR [10]

These terminals function as follows, according to the MOD bit settings in the RMD register.

Setting MOD to any value outside the range of 7 to 10 will be invalid. (Even when the setting is invalid, the

condition can be checked using RSTS.)

Setting

Terminal name

RMD register: MOD = 9, 10 RMD register: MOD = 7, 8

PA/PDR PA (pulsar input) PDR (positive external switch)

PB/MDR PB (pulsar output) MDR (negative external switch)

PA, PB: Input signals from a pulsar. The motor can be operated synchronously with this pulsar.

The input setting for the PA/PB signals can be selected: 2 pulses, 90 phase difference (1x, 2x,

or 4x magnification) controlled by the RENV2.PIM setting.

PDR, MDR: Input for an external switch signal. It can be set to keep operating while the switch is pressed

or to inch along with each press.

The input logic of this terminal can be selected by setting DRL in the RENV1 register.

A noise filter can be applied to the PA/PDR, PB/MDR inputs by setting RENV2.PINF.

The signal levels of the PA/PDR, PB/MDR terminals can be checked in the status registers(RSTS.SPA,

RSTS.SPB).

DA70115-1/2E

- 12 -

3-3-8. A0/PS0 [44], A1/PS1 [45], PS2 [46], PS3 [47], PS4 [48]

In stand-alone operation (MODE = HIGH), these terminals function as PS0 to PS4 input terminals for

selecting operating patterns.

When connected to a CPU (MODE = LOW), these terminals function as A0 and A1 inputs for selecting

device addresses.

In both cases, input logic is positive. (0: LOW and 1: HIGH)

Setting

Terminal name

MODE = LOW (Connected to a CPU)

MODE = HIGH (stand alone

operation)

A0/PS0 A0: Device address bit 0 PS0: Operation pattern setting 0

A1/PS1 A1: Device address bit 1 PS1: Operation pattern setting 1

PS2 Note 1 PS2: Operation pattern setting 2

PS3 Note 1 PS3: Operation pattern setting 3

PS4 Note 1 PS4: Operation pattern setting 4

The devices that match the device selection settings and bits 4 and 5 of the bus control command are

selected for connection. Therefore, a maximum of 4 PCD2112s can be connected to one serial bus.

Note 1: Do not change input levels on these terminals. Changing the input level while in operation will

stop the operation immediately, and the current position counter (RCUN) will be reset.

If the input status of PS0 to PS4 changes during stand alone operation, the PCD will immediately

stop the operation.

3-3-9. EA [11], EB [12], EZ [13]

EA and EB are encoder signal input terminals.

You can select the input specifications for these terminals as 2-pulse or 90 phase difference (1x, 2x, or 4x

magnifications)) by RENV2.EIN setting.

EN is the input terminal for encoder Z phase signals. It may be used in origin return operations.

You can check the level on each terminal using the status registers (RSTS.SEA, RSTS.SEB, and

RSTS.SEZ).

3-3-10. #BSY/#END [20]

This terminal outputs signals to indicate that the PCD2112 is busy or has completed its operation. Its

function is as follows, according to the RENV1.ENDM setting.

Setting

Terminal name

RENV1.ENDM = 0 RENV1.ENDM =1

#BSY/#END BSY (operating) END (operation complete)

#BSY: Outputs a LOW while in operation and returns HIGH after the operation is complete.

#END: When the operation is ended by #STA going LOW, this terminal goes LOW. When #STA goes HIGH,

this terminal returns to HIGH. For details about the differences between the BSY and END signals, see

section 10-2-1, #BSY/#END signals.

3-3-11. SD [15]

This is the ramp down switch signal input terminal.

By setting RMD.MSDE, you can enable/disable the SD signal. The input logic of this signal can be set in

RENV1.SDL.

By setting RENV1.SDM, you can set the PCD2112 either to decelerate, or to decelerate and stop when this

signal turns on.

When decelerate is selected, the motor will start decelerating when the SD signal turns on and will

accelerate again when the SD signal is turned off.

When the decelerate and stop is selected, the motor will accelerate again when SD turns off while

decelerating. However, if SD turns off after the motor has stopped, the motor will stay stopped.

By setting RENV1.SDLT, SD can be latched so that the motor can be decelerated and stopped by receiving a

one-shot pulse signal.

When starting operation, the PCD latches the input status of this terminal. Then, the PCD responds to a

change in this signal from off to on.

You can monitor the input status of the SD signal in the RSTS.SSD register. You can also monitor the SD

status after it is latched in the RSTS.SDIN register.

剩余86页未读，继续阅读

elihgt

粉丝: 0
资源: 1

PCD2112用户手册：串行总线脉冲控制LSI

PCD数据集--tutorials

velodyne点云生成pcd文件---1616749601.805126190.pcd

PyPI 官网下载 | image-pcd-1.3.0.tar.gz

pcd-files-retreival.zip

pcd-files-UWA.zip

pcd-files-stanford.zip

pcd-files-spacetime.zip

Python库 | pcd-0.1.2.tar.gz

点云文件，分别为milk.pcd和milk-cartoon-all-small-clorox.pcd

PCD-Digital-Test-Cases-v3.0a_final_version_clean_20181217.pdf

最新资源