ADS1212/13精密delta-sigma A/D转换器详解

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本文档介绍了ADS1212和ADS1213这两款高性能、精密的24位模拟-数字转换器（ADC）。这些设备的特点如下： 1. **高分辨率**：ADS1212和ADS1213具有24位分辨率，能够在单个+5V电源下工作，提供了极高的精度。这种高分辨率确保了在宽动态范围内的数据采集能力。 2. **delta-sigma架构**：这两种ADC采用delta-sigma架构，这是一种特殊的A/D转换技术，它利用积分器来实现宽广的动态范围，同时能够实现无漏码（22-bit no-missing codes）性能。这种设计确保了在高速采样时仍能保持高精度。 3. **有效分辨率**： - 在低速情况下（10Hz），通过集成一个低噪声输入放大器，实现了20位的有效分辨率。 - 而在1kHz的采样率下，独特的Turbo Modulator模式使得分辨率保持在16位，即使在较高的频率下也能维持良好的性能。 4. **低功耗**：ADS1212和ADS1213拥有极低的功耗，仅为1.4mW，这使得它们非常适合于电池供电或低功耗应用。 5. **差分输入**：设备设计考虑到了直接连接到传感器或其他低电压信号源的应用，提供两个差分输入端口，有利于信号的准确捕获。 6. **可编程增益放大器**：用户可以调整输入信号的增益，以适应不同范围的输入信号，增强了系统的灵活性。 7. **SPI兼容接口**：提供了标准的串行外围接口（SPI），简化了与微控制器等外围设备的连接和通信，提高了系统集成的便利性。 8. **可编程截止频率**：内置可编程截止频率，最高可达6.25kHz，有助于优化滤波和抗干扰性能。 9. **自校准功能**：ADS1213还包含了芯片内部的自校准机制，提高了精度和长期稳定性。 10. **多通道功能**：ADS1213特别之处在于它包含4通道的多路复用器，允许同时对多个信号进行数字化处理，进一步提升了效率。 ADS1212和ADS1213是理想的解决方案，尤其适用于需要高精度、宽动态范围以及低功耗的工业测量、控制系统和信号处理应用中。其先进的技术和丰富的特性使其成为电子工程师们的首选之一。

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ADS1212, 1213

SBAS064A

THEORY OF OPERATION

The ADS1212 and ADS1213 are precision, high dynamic

range, self-calibrating, 24-bit, delta-sigma A/D converters

capable of achieving very high resolution digital results.

Each contains a programmable gain amplifier (PGA); a

second-order delta-sigma modulator; a programmable digi-

tal filter; a microcontroller including the Instruction, Com-

mand and Calibration registers; a serial interface; a clock

generator circuit; and an internal 2.5V reference. The

ADS1213 includes a 4-channel input multiplexer.

In order to provide low system noise, common-mode rejec-

tion of 100dB and excellent power supply rejection, the

design topology is based on a fully differential switched

capacitor architecture. Turbo Mode, a unique feature of the

ADS1212/13, can be used to boost the sampling rate of the

input capacitor, which is normally 7.8kHz with a 1MHz

clock. By programming the Command Register, the sam-

pling rate can be increased to 15.6kHz, 31.2kHz, 62.5kHz,

or 125kHz. Each increase in sample rate results in an

increase in performance when maintaining the same output

data rate.

The programmable gain amplifier (PGA) of the ADS1212/

13 can be set to a gain of 1, 2, 4, 8 or 16—substantially

increasing the dynamic range of the converter and simplify-

ing the interface to the more common transducers (see Table

I). This gain is implemented by increasing the number of

samples taken by the input capacitor from 7.8kHz for a gain

of 1 to 125kHz for a gain of 16. Since the Turbo Mode and

PGA functions are both implemented by varying the sam-

pling frequency of the input capacitor, the combination of

PGA gain and Turbo Mode Rate is limited to 16 (see Table

II). For example, when using a Turbo Mode Rate of 8

(62.5kHz at 1MHz), the maximum PGA gain setting is 2.

The output data rate of the ADS1212/13 can be varied from

less than 1Hz to as much as 6.25kHz, trading off lower

resolution results for higher data rates. In addition, the data

rate determines the first null of the digital filter and sets the

–3dB point of the input bandwidth (see the Digital Filter

section). Changing the data rate of the ADS1212/13 does not

result in a change in the sampling rate of the input capacitor.

The data rate effectively sets the number of samples which

are used by the digital filter to obtain each conversion result.

A lower data rate results in higher resolution, lower input

bandwidth, and different notch frequencies than a higher

data rate. It does not result in any change in input impedance

or modulator frequency, or any appreciable change in power

consumption.

The ADS1212/13 also includes complete on-board calibra-

tion that can correct for internal offset and gain errors or

limited external system errors. Internal calibration can be

run when needed, or automatically and continuously in the

background. System calibration can be run as needed and the

appropriate input voltages must be provided to the ADS1212/

13. For this reason, there is no continuous system calibration

mode. The calibration registers are fully readable and writ-

able. This feature allows for switching between various

configurations—different data rates, Turbo Mode Rates, and

gain settings—without re-calibrating.

The various settings, rates, modes, and registers of the

ADS1212/13 are read or written via a synchronous serial

interface. This interface can operate in either a self-clocked

mode (Master Mode) or an externally clocked mode (Slave

Mode). In the Master Mode, the serial clock (SCLK) fre-

quency is one-quarter of the ADS1212/13 X

clock fre-

quency.

The high resolution and flexibility of the ADS1212/13 allow

these converters to fill a wide variety of A/D conversion

tasks. In order to ensure that a particular configuration will

meet the design goals, there are several important items

which must be considered. These include (but are certainly

not limited to) the needed resolution, required linearity,

desired input bandwidth, power consumption goal, and sen-

sor output voltage.

The remainder of this data sheet discusses the operation of

the ADS1212/13 in detail. In order to allow for easier

comparison of different configurations, “effective resolu-

tion” is used as the figure of merit for most tables and

graphs. For example, Table III shows a comparison between

data rate (and –3dB input bandwidth) versus PGA setting at

a Turbo Mode Rate of 1 and a clock rate of 1MHz. See the

Definition of Terms section for a definition of effective

resolution.

ANALOG ANALOG INPUT

INPUT

(1)

UTILIZING V

BIAS

(1,2)

FULL- EXAMPLE FULL- EXAMPLE

SCALE VOLTAGE SCALE VOLTAGE

GAIN RANGE RANGE

(3)

RANGE RANGE

(3)

SETTING (V) (V) (V) (V)

1 10 0 to 5 40 ±10

2 5 1.25 to 3.75 20 ±5

4 2.5 1.88 to 3.13 10 ±2.5

8 1.25 2.19 to 2.81 5 ±1.25

16 0.625 2.34 to 2.66 2.5 ±0.625

NOTE: (1) With a 2.5V reference, such as the internal reference. (2) This

example utilizes the circuit in Figure 12. Other input ranges are possible. (3)

The ADS1212/13 allows common-mode voltage as long as the absolute

input voltage on A

P or A

N does not go below AGND or above AV

TABLE I. Full-Scale Range vs PGA Setting.

TURBO MODE RATE AVAILABLE PGA SETTINGS

1 1, 2, 4, 8, 16

2 1, 2, 4, 8

4 1, 2, 4

8 1, 2

16 1

TABLE II. Available PGA Settings vs Turbo Mode Rate.

ADS1212, 1213

SBAS064A

DATA -3DB

RATE FREQUENCY

(HZ) (HZ) G = 1 G = 2 G = 4 G = 8 G = 16

10 2.62 20 20 20 19 18

25 6.55 19 19 19 18 18

30 7.86 19 19 18 18 17

50 13.1 17 17 17 17 16

60 15.7 17 17 17 16 16

100 26.2 15 15 15 15 15

250 65.5 12 12 12 12 12

EFFECTIVE RESOLUTION (BITS RMS)

For example, when the converter is configured with a

2.5V reference and placed in a gain setting of 2, the

typical input voltage range is 1.25V to 3.75V (common-

mode voltage = 2.5V). However, an input range of 0V to

2.5V (common-mode voltage = 1.25V) or 2.5V to 5V

(common-mode voltage = 3.75V) would also cover the

converter’s full-scale range.

Voltage Span—This is simply the magnitude of the typical

analog input voltage range. For example, when the converter

is configured with a 2.5V reference and placed in a gain

setting of 2, the input voltage span is 2.5V.

Least Significant Bit (LSB) Weight—This is the theoreti-

cal amount of voltage that the differential voltage at the

analog input would have to change in order to observe a

change in the output data of one least significant bit. It is

computed as follows:

where N is the number of bits in the digital output.

Effective Resolution—The effective resolution of the

ADS1212/13 in a particular configuration can be expressed

in two different units: bits rms (referenced to output) and

microvolts rms (referenced to input). Computed directly

from the converter’s output data, each is a statistical calcu-

lation based on a given number of results. Knowing one, the

other can be computed as follows:

The 10V figure in each calculation represents the full-scale

range of the ADS1212/13 in a gain setting of 1. This means

that both units are absolute expressions of resolution—the

performance in different configurations can be directly com-

pared regardless of the units. Comparing the resolution of

different gain settings expressed in bits rms requires ac-

counting for the PGA setting.

Main Controller—A generic term for the external micro-

controller, microprocessor, or digital signal processor which

is controlling the operation of the ADS1212/13 and receiv-

ing the output data.

TABLE III. Effective Resolution vs Data Rate and Gain

Setting. (Turbo Mode Rate of 1 and a 1MHz

clock.)

DEFINITION OF TERMS

An attempt has been made to be consistent with the termi-

nology used in this data sheet. In that regard, the definition

of each term is given as follows:

Analog Input Differential Voltage—For an analog signal

that is fully differential, the voltage range can be compared

to that of an instrumentation amplifier. For example, if both

analog inputs of the ADS1212 are at 2.5V, then the differ-

ential voltage is 0V. If one is at 0V and the other at 5V, then

the differential voltage magnitude is 5V. But, this is the case

regardless of which input is at 0V and which is at 5V, while

the digital output result is quite different.

The analog input differential voltage is given by the follow-

ing equation: A

P – A

N. Thus, a positive digital output is

produced whenever the analog input differential voltage is

positive, while a negative digital output is produced when-

ever the differential is negative.

For example, when the converter is configured with a 2.5V

reference and placed in a gain setting of 2, the positive full-

scale output is produced when the analog input differential

is 2.5V. The negative full-scale output is produced when the

differential is –2.5V. In each case, the actual input voltages

must remain within the AGND to AV

range (see Table I).

Actual Analog Input Voltage—The voltage at any one

analog input relative to AGND.

Full-Scale Range (FSR)—As with most A/D converters,

the full-scale range of the ADS1212/13 is defined as the

“input” which produces the positive full-scale digital output

minus the “input” which produces the negative full-scale

digital output.

For example, when the converter is configured with a 2.5V

reference and is placed in a gain setting of 2, the full-scale

range is: [2.5V (positive full scale) minus –2.5V (negative

full scale)] = 5V.

Typical Analog Input Voltage Range—This term de-

scribes the actual voltage range of the analog inputs which

will cover the converter’s full-scale range, assuming that

each input has a common-mode voltage that is greater than

REF

/PGA and smaller than (AV

– REF

/PGA).

LSB Weight =

Full−Scale Range

ER in bits rms =

20•log

10V

PGA









ER in Vrms













−1.76

6.02

ER in Vrms =

10V

PGA









6.02•ER in bits rms +1.76









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ADS1212/13精密delta-sigma A/D转换器详解

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void ADS8688_WriteProgramRegister(uint16_t Addr, uint16_t data) { ADS_CS1_L(); ADS8688_SPI_WB(Addr<<1| 0X01); ADS8688_SPI_WB(data); ADS_CS1_H(); ADS_CS2_L(); ADS8688_SPI_WB(Addr<<1| 0X01); ADS8688_SPI_WB(data); ADS_CS2_H(); } ads8688的这个写入是正确的吗？

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uint8_t ADS8688_ReadProgramRegister(uint8_t Addr) //8--16 { uint8_t data = 0; ADS_CS1_L(); ADS8688_SPI_WB(Addr<<1); data = ADS8688_SPI_RB(); data = ADS8688_SPI_RB(); ADS_CS1_H(); return data; }这一段的读取是否正确

void ADS8688_Write_Program_Register(uint8_t Addr,uint8_t data) { ADS_CS1_L();; ADS8688_SPI_WB(Addr<<1| 0X01); ADS8688_SPI_WB(data); ADS_CS1_H(); }

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