TI MSP430FR2512：电容式触摸感应微控制器

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"TI-MSP430FR2512.pdf是德州仪器(TI)推出的一款基于CapTIvate技术的电容式触摸感应混合信号微控制器的数据手册。这款器件适用于设计电容式触控应用，如触摸按钮、滑块和旋转编码器等。" TI的MSP430FR2512微控制器集成了一系列高级特性，以提供高效、可靠的电容式触控解决方案。CapTIvate技术确保了高灵敏度和抗干扰能力，能有效应对电力线、射频噪声和其他环境因素。它还包含了内置的扩展频谱、自动调优、噪声滤除和消抖算法，即使在严苛的电磁环境中也能保证触控操作的稳定性。该控制器支持多种触控功能，包括自电容和互电容感应，最多可配置8个自电容电极和16个互电容电极，允许混合使用以满足复杂的设计需求。此外，它还支持多点触控，具有广泛的电容检测范围，可适应不同电极尺寸，从0到300pF。在低功耗方面，MSP430FR2512表现出色，触摸唤醒电流低于4µA，这使得它非常适合电池供电或节能应用。它有一个专为触摸唤醒设计的状态机，能够在CPU休眠期间执行电极扫描，进一步降低功耗。硬件加速器则用于环境补偿、滤波和阈值检测，优化了处理效率。为了简化设计过程，TI提供了CapTIvate设计中心和PCGUI工具，允许工程师在不编写代码的情况下实时设计和调试电容按钮。此外，设备内置的CapTIvate软件库为用户应用程序提供了充足的FRAM存储空间。 MSP430FR2512采用16位RISC架构，最高时钟频率可达16MHz，并支持3.6V至1.8V的宽电源电压范围。它有多种低功耗模式，如激活模式、待机模式和关断模式，其中待机模式下，两个传感器的触摸唤醒电流同样小于4µA，充分体现了其超低功耗特性。 TI的MSP430FR2512是一款集高性能、低功耗和易用性于一体的电容式触控微控制器，适合用于需要触摸感应功能的各种便携式和电池供电设备。通过其强大的CapTIvate技术，开发者可以创建出稳定且用户友好的人机交互界面。

MSP430FR2522, MSP430FR2512

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(1) Only for input pins.

4.4 Pin Multiplexing

Pin multiplexing for this MCU is controlled by both register settings and operating modes (for example, if

the MCU is in test mode). For details of the settings for each pin and diagrams of the multiplexed ports,

see Section 6.11.

4.5 Buffer Types

Table 4-3 defines the pin buffer types that are listed in Table 4-1

Table 4-3. Buffer Types

BUFFER TYPE

(STANDARD)

NOMINAL

VOLTAGE

HYSTERESIS PU OR PD

NOMINAL

PU OR PD

STRENGTH

(µA)

OUTPUT

DRIVE

STRENGTH

(mA)

OTHER

CHARACTERISTICS

LVCMOS 3.0 V Y

(1)

Programmable

See

Section 5.11.4

See

Section 5.11.4

Analog 3.0 V N N/A N/A N/A

See analog modules in

Section 5 for details.

Power (DVCC) 3.0 V N N/A N/A N/A

SVS enables hysteresis on

DVCC.

Power (AVCC) 3.0 V N N/A N/A N/A

(1) Any unused pin with a secondary function that is shared with general-purpose I/O should follow the Px.0 to Px.7 unused pin connection

guidelines.

(2) The pulldown capacitor should not exceed 1.1 nF when using MCUs with Spy-Bi-Wire interface in Spy-Bi-Wire mode with TI tools like

FET interfaces or GANG programmers.

4.6 Connection of Unused Pins

Table 4-4 lists the correct termination of unused pins.

Table 4-4. Connection of Unused Pins

(1)

PIN POTENTIAL COMMENT

Px.0 to Px.7 Open Switched to port function, output direction (PxDIR.n = 1)

RST/NMI DV

47-kΩ pullup or internal pullup selected with 10-nF (or 1.1-nF) pulldown

(2)

TEST Open This pin always has an internal pull-down enabled.

MSP430FR2522, MSP430FR2512

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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) This applies I/Os worked in CapTIvate mode.

(3) All voltages referenced to V

(4) Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow

temperatures not higher than classified on the device label on the shipping boxes or reels.

5 Specifications

5.1 Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

Voltage applied at DVCC pin to V

–0.3 4.1 V

Voltage applied to any pin in CapTIvate mode

(2)

–0.3 V

REG

Voltage applied to any other pin

(3)

–0.3

+ 0.3

(4.1 V Max)

Diode current at any device pin ±2 mA

Maximum junction temperature, T

85 °C

Storage temperature, T

stg

(4)

–40 125 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as

±1000 V may actually have higher performance.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as ±250 V

may actually have higher performance.

5.2 ESD Ratings

VALUE UNIT

(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS‑001

(1)

±1000

Charged-device model (CDM), per JEDEC specification JESD22‑C101

(2)

±250

(1) Supply voltage changes faster than 0.2 V/µs can trigger a BOR reset even within the recommended supply voltage range. Following the

data sheet recommendation for capacitor C

DVCC

limits the slopes accordingly.

(2) Modules may have a different supply voltage range specification. See the specification of the respective module in this data sheet.

(3) TI recommends that power to the DVCC pin must not exceed the limits specified in Recommended Operating Conditions. Exceeding the

specified limits can cause malfunction of the device including erroneous writes to RAM and FRAM.

(4) The minimum supply voltage is defined by the SVS levels. See the SVS threshold parameters in Table 5-2.

(5) A capacitor tolerance of ±20% or better is required. A low-ESR ceramic capacitor of 100 nF (minimum) should be placed as close as

possible (within a few millimeters) to the respective pin pair.

(6) Modules may have a different maximum input clock specification. See the specification of the respective module in this data sheet.

(7) Wait states only occur on actual FRAM accesses (that is, on FRAM cache misses). RAM and peripheral accesses are always executed

without wait states.

(8) If clock sources such as HF crystals or the DCO with frequencies >16 MHz are used, the clock must be divided in the clock system to

comply with this operating condition.

5.3 Recommended Operating Conditions

MIN NOM MAX UNIT

Supply voltage applied at DVCC pin

(1)(2)(3)(4)

1.8 3.6 V

Supply voltage applied at DVSS pin 0 V

Operating free-air temperature –40 85 °C

Operating junction temperature –40 85 °C

DVCC

Recommended capacitor at DVCC

(5)

4.7 10 µF

SYSTEM

Processor frequency (maximum MCLK frequency)

(4)(6)

No FRAM wait states

(NWAITSx = 0)

0 8

MHz

With FRAM wait states

(NWAITSx = 1)

(7)

0 16

(8)

ACLK

Maximum ACLK frequency 40 kHz

SMCLK

Maximum SMCLK frequency 16

(8)

MHz

MSP430FR2522, MSP430FR2512

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(1) All inputs are tied to 0 V or to V

. Outputs do not source or sink any current.

(2) Not applicable for MCUs with HF crystal oscillator only.

(3) Characterized with a Seiko Crystal SC-32S crystal with a load capacitance chosen to closely match the required load.

(4) Low-power mode 3, 12.5-pF crystal, includes SVS test conditions:

Current for watchdog timer clocked by ACLK and RTC clocked by XT1 included. Current for brownout and SVS included (SVSHE = 1).

CPUOFF = 1, SCG0 = 1 SCG1 = 1, OSCOFF = 0 (LPM3),

XT1

= 32768 Hz, f

ACLK

= f

XT1

, f

MCLK

= f

SMCLK

= 0 MHz

(5) Low-power mode 3, VLO, excludes SVS test conditions:

Current for watchdog timer clocked by VLO included. RTC disabled. Current for brownout included. SVS disabled (SVSHE = 0).

CPUOFF = 1, SCG0 = 1 SCG1 = 1, OSCOFF = 0 (LPM3)

XT1

= 32768 Hz, f

ACLK

= f

MCLK

= f

SMCLK

= 0 MHz

(6) RTC periodically wakes up every second with external 32768-Hz input as source.

(7) CapTIvate technology works in LPM3 with one proximity sensor for wake on touch. CapTIvate BSWP demonstration board with 1.5-mm

overlay. Current for brownout included. SVS disabled (SVSHE = 0).

SCAN

= 8 Hz, f

CONVER

= 2 MHz, COUNTS = 800

(8) CapTIvate technology works in LPM3 with one button, wake on touch.CapTIvate BSWP demonstration board with 1.5-mm overlay,

Current for brownout included. SVS disabled (SVSHE = 0).

SCAN

= 8 Hz, f

CONVER

= 2 MHz, COUNTS = 250

(9) CapTIvate technology works in LPM3 with two self-capacitance buttons, wake on touch. CapTIvate BSWP demonstration board with

1.5-mm overlay. Current for brownout included. SVS disabled (SVSHE = 0).

SCAN

= 8 Hz, f

CONVER

= 2 MHz, COUNTS = 250

(10) CapTIvate technology works in LPM3 with 8 self-capacitance buttons. The CPU enters active mode in between time cycles to configure

the conversions and read the results. CapTIvate BSWP demonstration board with 1.5-mm overlay. Current for brownout included. SVS

disabled (SVSHE = 0).

SCAN

= 8 Hz, f

CONVER

= 2 MHz, COUNTS = 250

(11) CapTIvate technology works in LPM3 with 16 mutual-capacitance buttons. The CPU enters active mode in between time cycles to

configure the conversions and read the results. CapTIvate phone demonstration board with 1.5-mm overlay. Current for brownout

included. SVS disabled (SVSHE = 0).

SCAN

= 8 Hz, f

CONVER

= 2 MHz, COUNTS = 250

(12) Low-power mode 4, CPUOFF = 1, SCG0 = 1 SCG1 = 1, OSCOFF = 1 (LPM4), CPU and all clocks are disabled, WDT and RTC

disabled

5.7 Low-Power Mode (LPM3, LPM4) Supply Currents (Into V

) Excluding External Current

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

(1)

PARAMETER V

–40°C 25°C 85°C

UNIT

TYP MAX TYP MAX TYP MAX

LPM3,XT1

Low-power mode 3, 12.5-pF crystal, includes

SVS

(2)(3)(4)

3 V 0.96 1.11 2.75 6.2

µA

2 V 0.93 1.08 2.78

LPM3,VLO

Low-power mode 3, VLO, excludes SVS

(5)

3 V 0.77 0.92 2.66 6.0

µA

2 V 0.75 0.90 2.60

LPM3, RTC

Low-power mode 3, RTC, excludes SVS

(6)

3 V 0.90 1.05 2.77 µA

LPM3, CapTIvate,

1 proximity, wake on

touch

Low-power mode 3, CapTIvate , excludes SVS

(7)

3 V 4.7 µA

LPM3, CapTIvate,

1 button, wake on

touch

Low-power mode 3, CapTIvate , excludes SVS

(8)

3 V 3.0 µA

LPM3, CapTIvate,

2 buttons, wake on

touch

Low-power mode 3, CapTIvate, excludes SVS

(9)

3 V 3.2 µA

LPM3, CapTIvate,

8 buttons

Low-power mode 3, CapTIvate, excludes SVS

(10)

3 V 17 µA

LPM3, CapTIvate,

16 buttons

Low-power mode 3, CapTIvate, excludes SVS

(11)

3 V 38 µA

LPM4, SVS

Low-power mode 4, includes SVS

(12)

3 V 0.51 0.64 2.30

µA

2 V 0.49 0.61 2.25

LPM4

Low-power mode 4, excludes SVS

(12)

3 V 0.35 0.48 2.13

µA

2 V 0.34 0.46 2.10

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