C2接口的引脚共享与隔离技术

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"关于C2口的复用.pdf" 在微控制器设计中，C2接口是一种常用的两线制通信接口，用于设备的在系统编程（ISP）、调试和边界扫描测试。C8051F30x系列器件内嵌了Cygnal的C2接口，以实现这些功能。这个接口包括两个关键信号：C2时钟（C2CK）和C2数据（C2D）。为了节省封装引脚，C2CK和C2D还同时作为用户引脚/RST和P0.7使用。 C2CK和C2D的复用特性意味着当进行C2操作时，如编程、调试或测试，这两个引脚的角色会发生变化。在正常用户模式下，/RST引脚通常用于系统的复位功能，而P0.7是GPIO口的一部分。然而，在需要C2功能时，外部电阻通常会被用来隔离C2通信与外部系统，以防止相互干扰。应用笔记AN024-1.0详细讨论了针对不同用户功能的C2隔离配置。如果/RST和P0.7引脚没有被其他用户功能占用，则无需额外的隔离电路。这是因为C2接口在不需要执行C2操作时，会释放这些引脚以便于它们执行其原有的用户功能。关键点在于理解/RST和P0.7引脚如何在C2通信期间被“借用”。在实际应用中，根据这些引脚的用途，可能需要采用不同的隔离策略。例如，如果/RST用作系统复位，可能需要在C2操作期间断开与外部系统的连接，以避免复位信号对C2通信的影响。同样，如果P0.7被用作数字输入/输出，也需要适当的隔离来确保C2数据传输不受影响。此外，为了实现有效的C2接口功能，设计者必须考虑电源管理、信号完整性以及在系统调试期间如何切换到C2模式等问题。这可能涉及到在硬件设计中加入特定的控制逻辑，或者在固件中添加代码来管理引脚状态的切换。 C2口的复用是一种高效利用微控制器引脚资源的方法，但同时也需要设计者在系统设计阶段充分考虑隔离和控制策略，以确保C2功能与常规用户功能的兼容性。正确理解和运用这些技术，可以使得C8051F30x系列器件在各种应用中发挥最大的灵活性和功能性。

CYGNAL Integrated Products, Inc. AN024-1.0NOV01

Austin, TX 78746

www.cygnal.com

Pin Sharing Techniques for the C2 Interface

CYGNAL Application Note

Introduction

C8051F30x devices include an on-chip Cygnal

2-Wire (C2) Interface for in-system program-

ming, debugging, and boundary scan testing.

Two signals are associated with the C2 Inter-

face: C2 Clock (C2CK) and C2 Data (C2D).

To preserve package pins, the C2CK and C2D

pins also function as the user pins /RST and

P0.7, respectively.

To enable in-system programming, debugging,

and/or boundary scan functions, external resis-

tors are typically used to isolate C2 traffic

from the external system. The isolation config-

uration depends on the user function associ-

ated with the /RST and P0.7 pins on the target

device. This application note discusses C2 iso-

lation configurations for each user function. If

pins /RST and P0.7 are not occupied by user

functions, no isolation circuitry is needed.

Key Points

• Pins /RST and P0.7 are ‘borrowed’ by the

C2 Interface during C2 communication.

• Isolation resistors are typically required to

perform in system programming, debug-

ging, or boundary scan testing via C2.

• The C2 isolation configuration depends on

the user function associated with pins /RST

and P0.7.

About the C2 Pins

When C2 communication is idle, the C2 pins

(C2CK and C2D) function as user pins /RST

and P0.7, respectively. The interface master

initiates C2 communication by generating an

active-low strobe on the C2CK pin. Following

this strobe, the interface master may safely

‘borrow’ the C2 pins without disturbing the

user functions.

C2CK (/RST)

The C2CK signal provides the clock for all C2

communications. When C2 communication is

idle, the C2CK pin functions as the active-low

reset I/O pin (/RST).

As a user input, the C2CK pin is used to gener-

ate a device reset when held low for more than

20 µs. As a user output, the C2CK pin may be

driven low by the on-chip ‘F30x VDD moni-

tor. When the C2CK pin is not being driven, an

internal (weak) pull-up resistor pulls the C2CK

pin high. For in-system debugging, an external

pull-up resistor is required (see Figure 6).

C2 events on C2CK are ignored by the reset

hardware as long as C2CK is low for less than

5 µs. Since the C2CK pin is always an open-

drain output, the interface master may initiate

C2 communication at any time with an active-

low strobe on C2CK.

evan

ces

This application note applies to the following devices:

C8051F300, C8051F301, C8051F302, and C8051F303.

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