VW2010硬件详解：MPEG4编解码器的内部构造揭秘

5星 · 超过95%的资源需积分: 14 185 浏览量更新于2025-01-02 收藏 3.99MB PDF 举报

本文档详细介绍了VW2010硬件的相关特性和内部结构，主要聚焦于VW2010A/V/SCODEC芯片。Vweb Corporation是一家专注于视频编码与解码技术的公司，其产品VW2010在当时的市场中应用广泛，特别是在MPEG4编解码方面表现出色。文档版本为0.92，发布日期为2003年5月13日，旨在为用户提供技术规格和理解该产品的核心技术。首先，硬件描述部分可能会涵盖VW2010芯片的设计特点，可能包括其架构、核心组件（如视频处理器单元、音频解码器、内存控制器等）、接口标准（例如HDMI、USB、SATA等）以及功耗管理等。这些细节对于系统集成者、工程师以及开发者来说，是了解如何在实际应用中优化性能和确保兼容性的重要参考。文档强调了版权和保密协议的重要性，指出未经Vweb Corporation书面许可，不得复制或传播该文档的任何部分。这意味着获取此技术资料的接收方需要与Vweb签订非披露协议，以确保知识产权的保护。此外，文中还提到了Vweb的商标，包括标志、口号以及产品系列名称（如VW2000、VW2005和VW2010），这些都是Vweb Corporation的品牌象征，反映了公司在视频处理领域的专业地位。商标法律条款也提醒读者，文档中提及的其他商标属于各自的产权所有者，尊重他人的知识产权是行业规范。最后，文档可能涉及到VW2010所采用的知识产权策略，购买或使用Vweb的产品或文档并不意味着可以自由使用第三方的专利或专有技术，这表明Vweb在确保自身技术优势的同时，也注重合规操作，避免侵犯他人的知识产权。阅读这份VW2010硬件介绍文档，用户可以深入了解到Vweb Corporation的视频编解码器技术的核心细节，包括芯片的架构、功能特性以及在MPEG4编解码方面的性能表现，同时还能学习到关于版权、商标和知识产权管理的关键信息。这对于了解该产品及其在市场中的竞争优势至关重要。

Functional Description Vweb Proprietary and Confidential

Vwe

Corp.

- PROPR

ARY

e Re

MINA

VW2010 Hardware Description PRELIMINARY

page 2 May 13, 2003

Figure 1 Block Diagram of the VW2010

MPEG Decoder

Modules

The MPEG decoder in the VW2010 consists of the following modules:

! Demultiplexer (DEMUX)

! Video decoder/decompression core units

" Variable length decoding unit (VLD)

" Inverse quantization / inverse discrete cosine transform unit (IQ/IDCT)

" Motion compensation unit (MCU)

" Decoder central processor unit (dCPU)

! Audio decoder/decompression in the RISC/DSP processor

! Video graphics and output unit (VOU)

! Audio output unit (AOU)

As an MPEG video and audio decoder, the VW2010 demultiplexes an MPEG bit-

stream into its video, audio and user data components (if any), decompresses the video

and audio information, and combines the video with graphics, Closed Caption, Teletext

or other user data. The output video data is presented in standard ITU-R.BT.656 for-

mat. The output audio is available in I

S or S/P-DIF digital audio format, or as IEC-

61937 compressed audio.

System Modules The VW2010 includes a power management module (PMU) and a number of I/O

interface modules:

! Host/PCI interface (for an external processor, storage and other devices)

Vweb Proprietary and Confidential Functional Description

PRELIMINARY VW2010 Hardware Description

May 13, 2003 page 3

Corp.

- PROPR

ARY

e Re

MINA

! DMA controller (DMA)

! ROM interface (for boot and other microcode)

! General purpose input / output (GPIO)

! Boundary scan ports (JTAG and EJTAG)

! Phase-locked loops (main PLL and audio PLL)

! Inter-device communications interface (ICI)

All of these modules are described in some detail later in this manual (“Encoder Mod-

ules” on page 19, “Decoder Modules” on page 29, and “System Modules” on page 39).

Host Interface Modes

The host interface of the VW2010 can be configured to operate in the following host

modes:

! 16-bit Motorola-style mode

! 16-bit Intel-style mode

! PCI target mode

These modes can be selected at power-up / reset, as described in the section titled

“Host Mode” on page 49.

Data Paths

Transfer of data among these modules takes place using the following means:

! Direct input and output ports (shown in Figure 2 on page 5)

! Two dedicated high-speed SDRAM buses (shown in Figure 2 on page 5)

! DMA channels between selected modules (shown in Figure 3 on page 8)

The main I/O ports of the VW2010 are shown in Figure 2 on page 5. A list and descrip-

tion of the I/O signals are presented at the end of this manual (“Encoder Interface Sig-

nals” on page 63, “Decoder Interface Signals” on page 69, and “System Interface

Signals” on page 75).

Two dedicated high-speed SDRAM buses connect the RISC to the two SDRAM inter-

faces. The encoder SDRAM bus is 32 bits wide, and the decoder SDRAM bus is 64 bits

wide. Both interfaces to the external SDRAM devices are 32 bits wide. All modules in

the encoder exchange data among themselves via the encoder SDRAM bus. All mod-

ules in the decoder exchange data among themselves via the decoder SDRAM bus.

To perform the functions of the VW2010, the physical data paths can be used to facil-

itate the following functional data paths between I/O and encoder/decoder modules:

Functional Description Vweb Proprietary and Confidential

Vwe

Corp.

- PROPR

ARY

e Re

MINA

VW2010 Hardware Description PRELIMINARY

page 6 May 13, 2003

In the RISC, the compressed video from the encoder core modules is optionally com-

bined with compressed audio, and with user data, if any; then the data is multiplexed

and/or processed for network delivery. The resulting compressed data stream (CDO

bitstream) is sent to the multiplexer buffer controller (BUF) via the encoder SDRAM

bus.

By this time the CDO is a regular MPEG bitstream (SS, PS, TS, ES or PES, depending

on how the encoder was set up). For the sake of generality, in this document this MPEG

bitstream is still called CDO.

Compressed Data

Output Paths (CDO)

Under control by the RISC, the multiplexer buffer controller (BUF) sets up the appro-

priate buffers and FIFOs, and routes the CDO bitstream to the host/PCI interface

unit's output port, or directly to the dedicated 8-bit parallel or 1-bit serial CDO output

port.

Compressed Data

Input Paths (CDI)

Multiplexed / combined / compressed data input bitstream (CDI), as well as user data

and VBI, can be input on one of the input ports: on the host/PCI port, or on the ded-

icated 8-bit parallel / 1-bit serial CDI input port. From these ports, the data is internally

routed to the demultiplexer (DEMUX), which directly stores the data in the decoder or

encoder SDRAM via the corresponding high speed SDRAM bus (without demultiplex-

ing at this time).

There is no separate compressed audio input path. It is assumed the CDI bistream may

contain or may consist of tagged video, audio or user data components.

Decoder Paths Decoder processing begins in the RISC. It selects buffers and FIFOs for use by the

demultiplexer (DEMUX). The DEMUX retrieves the CDI from SDRAM, extracts

video, audio and user data from the CDI, and places each type of data into their sepa-

rated buffers and FIFOs. The data flow between the decoder modules the takes place

via the decoder SDRAM, as follows.

The demultiplexer (DEMUX) extracts video data from the CDI bitstream, and sends

it to the video decoder core via the decoder SDRAM. The video decoder core modules

retrieve this data from SDRAM as needed. The video decoding core modules read and

write to the SDRAM the intermediate and final results of the MPEG-1, -2, -4 or H.263

decoding / decompressing / filtering calculations. The decoder core sends the resulting

video data to the video output unit (VOU) via SDRAM. The VOU completes the con-

version of the video data to the ITU.R-BT.656 format. The VOU also contains a graph-

ics module, which, under user control, can generate multiple graphics overlays to be

superimposed on the video.

The DEMUX extracts user data from the CDI bitstream, and sends it to the decoder

SDRAM, for further processing by the RISC. In the RISC, user data is converted to

Closed Caption or Teletext data, and sent back into SDRAM as VBI data to be mixed

with the video data in the VOU.

The DEMUX extracts audio data from the CDI bitstream, and sends it to the decoder

SDRAM. The audio is decompressed using the DSP extensions within the RISC, and

put back into SDRAM. The audio output unit (AOU) retrieves this data from SDRAM

and converts it to I

S or S/P-DIF format.

剩余191页未读，继续阅读

xxyue

粉丝: 0
资源: 10

VW2010硬件详解：MPEG4编解码器的内部构造揭秘

VW2010 Windows SDK开发第二部分API文档

vw2010 Windows开发SDK核心内容解析

VW2010芯片嵌入式监控系统：压缩/解压卡设计与Linux驱动实现

vw2010开发文档

基于VW2010的视频存储系统的设计.docx

0_frontmatter_v1.1.rar_vw2010

施耐德变频器ATV-IMC控制器VW3A3521S0硬件指南.pdf

飞利浦190vw

vw虚拟机汉化包

KEIL2和VW工具

最新资源