IEEE 1588协议：嵌入式处理器的精密时钟同步详解

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IEEE 1588.pdf 是一篇关于精密时钟同步的深入研究文章，发表在2009年11月的《模拟对话》期刊上。本文作者江武和罗伯特·佩洛金探讨了如何利用 IEEE 1588 协议对网络中的分布式时钟进行精确同步，特别是在测试与测量、电信通信和多媒体流等领域中。该标准在2002年发布，随后在2008年的更新版本中进行了增强，以适应更广泛的应用需求。 IEEE 1588，也称为PTP (Precision Time Protocol)，是一种网络协议，旨在提供低成本、支持异构系统且能达到纳秒级精度的时间同步。这种标准化方法对于需要高度时间一致性应用的重要性日益增加，如工业自动化、数据中心监控和金融交易系统等。文章重点介绍了原版 IEEE 1588-2002 标准的基本原理和操作流程，以及其升级版本 IEEE 1588-2008 所带来的改进。其中特别强调了 ADSP-BF5181 Blackfin嵌入式处理器针对 IEEE 1588 的硬件支持。这款处理器集成了专用的 IEEE 1588 功能，使得在实时系统中实现精确时钟同步成为可能。文章接着给出了一个具体的实例，通过 ADSP-BF5181 解决方案展示了实际应用中所获得的时钟同步性能结果。这包括同步精度、延迟测量以及在高吞吐量网络环境中的稳定性测试。这些实验数据和案例分析为读者提供了对如何在实际工程环境中实施和优化 IEEE 1588 系统的宝贵参考。这篇文章不仅介绍了 IEEE 1588 技术的核心概念，还提供了实用的技术指南和实践经验，对于那些寻求在嵌入式系统中采用精确时钟同步的工程师和技术人员来说是一份有价值的参考资料。理解并掌握这个标准和实施策略，能够帮助他们在设计高性能、低延迟的系统时，确保关键任务的时间同步性能。

Analog Dialogue 43-11, November (2009) 1

Synchronizing Device Clocks

Using IEEE 1588 and Blackn

Embedded Processors

By Jiang Wu and Robert Peloquin

Introduction

The IEEE 1588 standard, introduced in 2002, denes a protocol

to synchronize distributed clocks on a network. It is becoming

the preferred clock synchronization method for many different

applications, including test and measurement, telecommunications,

and multimedia streaming. This standardized method for

synchronizing clocks is cost-effective, supports heterogeneous

systems, and provides nanosecond-level synchronization precision.

This article provides an introduction to both the original IEEE

1588-2002 standard and the enhancements incorporated as part

of the updated IEEE 1588-2008 version. Dedicated hardware

support for IEEE 1588 has been integrated into the ADSP-BF518

Blackfin

embedded processor because of the increasing

importance of IEEE 1588 in some of its targeted applications. An

overview of its capabilities is provided, followed by an example

showing clock synchronization performance results obtained by

an ADSP-BF518 processor solution.

What Time Is It?

It is common for a system to need to maintain its own sense of time

using a local oscillator. Figure 1 shows how hardware and software

combine to generate time information within a system.

SOFTWARE

APPLICATION HARDWARE

CLOCK OUTPUT

LOCAL TIME SYSTEM

NUMBER OF

PULSES

H:M:S TIME

APPLICATION

DIVIDER

COUNTEROSCILLATOR

FREQUENCY

CONVERSION

TIME

HOUR:MIN:SEC

EPOCH

HARDWARE

APPLICATION SOFTWARE

API FUNCTIONS

Figure 1. Local timekeeping.

This time information can be used by both hardware and software

resources within the system. In hardware, one or more physical

clock signals (clock outputs) are derived from the oscillator’s clock

and can be used to drive or trigger other parts of the system. The

time maintained in software is typically referred to as system time.

The system time can be represented in the form of numbers of clock

pulses or in second/nanosecond notation. The system software

derives the time from the number of oscillator clock pulses and

its frequency information, and provides application-programming-

interface (API) functions that other parts of the software use to

retrieve and set the time. If an absolute time is desired, the provided

time is associated with a predened epoch, which identies a

reference point in time.

Synchronize Your Watches

Many applications require two independent devices to operate in

a synchronized fashion. If each device were to rely solely on its

own oscillator, differences between the specic characteristics

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and operating conditions of the individual oscillators would limit

the ability of the clocks to operate synchronously. Some possible

simplistic solutions to address these limitations include:

• All the devices could use a single physical oscillator. This is only feasible

for distributed systems in close proximity; a high-frequency clock

signal cannot be reliably delivered over a long distance.

• All the devices could utilize oscillators with nearly identical

characteristics. This approach is impractical due to the difculty

of acquiring nearly identical oscillators and keeping them from

drifting apart over time. More importantly, each oscillator will

be subjected to different operating conditions.

• If all the devices are interconnected via a communications network

such as Ethernet, they can dynamically adjust their individual clocks

to a single “master” clock by exchanging time messages over the

network. With network time protocol (NTP), the traditional time

synchronization protocol, every device in the system adjusts

its clock according to the time information it retrieves from

an NTP time server. However, this protocol can only achieve

synchronization accuracy on the order of milliseconds.

IEEE 1588 denes a newer protocol capable of nanosecond

synchronization accuracy. How it can achieve this level of clock

synchronization is discussed in the following sections.

What IEEE 1588 Does

The IEEE 1588 standard denes a protocol for time-synchronizing

devices that are geographically dispersed but interconnected by

some form of communications technology, for example, Ethernet.

By exchanging timing messages between devices they can maintain

the same absolute system time, which is represented in seconds

and nanoseconds.

An intuitive way to achieve this goal is for one device, which has

the “best” (most accurate) clock, and is designated as the master-

clock device, to broadcast its time to the other devices. The other

dev ices will adjust their times to match t he t ime sent by t he master

clock. This solution has several limitations, though:

1. The master-clock device cannot broadcast the time at

innitesimal intervals, so the “slave” clock devices have to use

their own independent and “inferior” oscillators to interpolate

the time points between two broadcasts from the master-clock

device. This results in degraded synchronization during the

time between updates from the master clock.

2. Delays inevitably exist on the broadcast path, with magnitudes

depending on the communications technology—the time that

a physical signal takes to travel along a wire from one device to

another, for example. This delay results in an additional offset

between the master clock and each slave clock.

3. Differences among the broadcast paths between the master-

clock device and each slave-clock device will further degrade

the synchronization between individual slave-clock devices.

IEEE 1588 species a protocol that solves the second and third

problems by measuring path delay. It also allows the slave clock

to be adjusted to match the master clock’s pace so as to mitigate

the rst problem. Where possible, the rst problem can be

further reduced by using smaller broadcasting intervals and

higher-quality oscillators.

How IEEE 1588 Measures Communication Delay

IEEE 1588-2002

defines four messages to measure the

communication delay of the forward (master to slave) and

backward (slave to master) paths: Sync, Followup, DelayReq, and

DelayResp. The newer version, IEEE 1588-2008,

prov ides further

mechanisms to measure the peer-to-peer delay with three additional

messages: PdelayReq, PdelayResp, and PdelayRespFollowup.

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