计算机组织与设计：ARM版——硬软件接口的经典教材

需积分: 9 192 浏览量更新于2024-07-17 收藏 30.94MB PDF 举报

"《计算机组织与设计：硬件/软件接口 ARM 版本》是一本由图灵奖得主David A. Patterson和John L. Hennessy共同编写的经典教材，于2017年发行。这本书以其卓越的教学方法、全面的内容覆盖、优秀的阐述质量、严谨的学术标准和适中的价格，在众多计算机组织教材中脱颖而出。它不仅是计算机组织领域首屈一指的教科书，更是计算机科学教材的一个典范，旨在提供全面而深入的理解。作者们在书中探讨了计算机系统的核心概念，包括处理器架构、内存管理、输入输出系统等，并特别关注了ARM这样的嵌入式处理器，反映了从台式机计算到移动计算，再到大数据时代的技术变迁。新版教材新增了对如何通过软件和硬件交互来提升性能的深入剖析，以及云计算技术的相关内容，使读者能够紧跟时代的步伐。对于新一代的科技学习者，如千禧一代，这本《计算机组织与设计》无疑是计算机架构领域的必备参考书籍。它不仅保持了基础知识的扎实，而且与时俱进，为读者提供了一个全面理解计算机内部工作原理和现代技术接口的平台。无论是作为课堂教材，还是个人的学习资料，它都能满足学习者从入门到进阶的需求，是学习计算机科学和工程的理想之选。"

Preface

e most beautiful thing we can experience is the mysterious. It is the

source of all true art and science.

Albert Einstein, What I Believe, 1930

About This Book

We believe that learning in computer science and engineering should reect

the current state of the eld, as well as introduce the principles that are shaping

computing. We also feel that readers in every specialty of computing need

to appreciate the organizational paradigms that determine the capabilities,

performance, energy, and, ultimately, the success of computer systems.

Modern computer technology requires professionals of every computing

specialty to understand both hardware and soware. e interaction between

hardware and soware at a variety of levels also oers a framework for understanding

the fundamentals of computing. Whether your primary interest is hardware or

soware, computer science or electrical engineering, the central ideas in computer

organization and design are the same. us, our emphasis in this book is to show

the relationship between hardware and soware and to focus on the concepts that

are the basis for current computers.

e recent switch from uniprocessor to multicore microprocessors conrmed

the soundness of this perspective, given since the rst edition. While programmers

could ignore the advice and rely on computer architects, compiler writers, and silicon

engineers to make their programs run faster or be more energy-ecient without

change, that era is over. For programs to run faster, they must become parallel.

While the goal of many researchers is to make it possible for programmers to be

unaware of the underlying parallel nature of the hardware they are programming,

it will take many years to realize this vision. Our view is that for at least the next

decade, most programmers are going to have to understand the hardware/soware

interface if they want programs to run eciently on parallel computers.

e audience for this book includes those with little experience in assembly

language or logic design who need to understand basic computer organization as

well as readers with backgrounds in assembly language and/or logic design who

want to learn how to design a computer or understand how a system works and

why it performs as it does.

xvi Preface

About the Other Book

Some readers may be familiar with Computer Architecture: A Quantitative

Approach, popularly known as Hennessy and Patterson. (is book in turn is

oen called Patterson and Hennessy.) Our motivation in writing the earlier book

was to describe the principles of computer architecture using solid engineering

fundamentals and quantitative cost/performance tradeos. We used an approach

that combined examples and measurements, based on commercial systems, to

create realistic design experiences. Our goal was to demonstrate that computer

architecture could be learned using quantitative methodologies instead of a

descriptive approach. It was intended for the serious computing professional who

wanted a detailed understanding of computers.

A majority of the readers for this book do not plan to become computer

architects. e performance and energy eciency of future soware systems will

be dramatically aected, however, by how well soware designers understand the

basic hardware techniques at work in a system. us, compiler writers, operating

system designers, database programmers, and most other soware engineers

need a rm grounding in the principles presented in this book. Similarly,

hardware designers must understand clearly the eects of their work on soware

applications.

us, we knew that this book had to be much more than a subset of the material

in Computer Architecture, and the material was extensively revised to match the

dierent audience. We were so happy with the result that the subsequent editions of

Computer Architecture were revised to remove most of the introductory material;

hence, there is much less overlap today than with the rst editions of both books.

Why ARMv8 for This Edition?

e choice of instruction set architecture is clearly critical to the pedagogy of a

computer architecture textbook. We didn’t want an instruction set that required

describing unnecessary baroque features for someone’s rst instruction set, no

matter how popular it is. Ideally, your initial instruction set should be an exemplar,

just like your rst love. Surprisingly, you remember both fondly.

Since there were so many choices at the time, for the rst edition of Computer

Architecture: A Quantitative Approach we invented our own RISC-style instruction

set. Given the growing popularity and the simple elegance of the MIPS instruction

set, we switched to it for the rst edition of this book and to later editions of the

other book. MIPS has served us and our readers well.

e incredible popularity of the ARM instruction set—14 billion instances were

shipped in 2015—led some instructors to ask for a version of the book based on

ARM. We even tried a version of it for a subset of chapters for an Asian edition

of this book. Alas, as we feared, the baroqueness of the ARMv7 (32-bit address)

instruction set was too much for us to bear, so we did not consider making the

change permanent.

Preface xvii

To our surprise, when ARM oered a 64-bit address instruction set, it made so

many signicant changes that in our opinion it bore more similarity to MIPS than

it did to ARMv7:

■ e registers were expanded from 16 to 32;

■ e PC is no longer one of these registers;

■ e conditional execution option for every instruction was dropped;

■ Load multiple and store multiple instructions were dropped;

■ PC-relative branches with large address elds were added;

■ Addressing modes were made consistent for all data transfer instructions;

■ Fewer instructions set condition codes;

and so on. Although ARMv8 is much, much larger than MIPS—the ARMv8

architecture reference manual is 5400 pages long—we found a subset of ARMv8

instructions that is similar in size and nature to the MIPS core used in prior editions,

which we call LEGv8 to avoid confusion. Hence, we wrote this ARMv8 edition.

Given that ARMv8 oers both 32-bit address instructions and 64-bit address

instructions within essentially the same instruction set, we could have switched

instruction sets but kept the address size at 32 bits. Our publisher polled the faculty

who used the book and found that 75% either preferred larger addresses or were

neutral, so we increased the address space to 64 bits, which may make more sense

today than 32 bits.

e only changes for the ARMv8 edition from the MIPS edition are those associated

with the change in instruction sets, which primarily aects Chapter2, Chapter3, the

virtual memory section in Chapter5, and the short VMIPS example in Chapter6. In

Chapter 4, we switched to ARMv8 instructions, changed several gures, and added

a few “Elaboration” sections, but the changes were simpler than we had feared.

Chapter1 and the rest of the appendices are virtually unchanged. e extensive online

documentation and combined with the magnitude of ARMv8 make it dicult to come

up with a replacement for the MIPS version of Appendix A (“Assemblers, Linkers, and

the SPIM Simulator” in the MIPS Fih Edition). Instead, Chapters2, 3, and 5 include

quick overviews of the hundreds of ARMv8 instructions outside of the core ARMv8

instructions that we cover in detail in the rest of the book. We believe readers of this

edition will have a good understanding of ARMv8 without having to plow through

thousands of pages of online documentation. And for any reader that adventurous, it

would probably be wise to read these surveys rst to get a framework on which to hang

on the many features of ARMv8.

Note that we are not (yet) saying that we are permanently switching to ARMv8.

For example, both ARMv8 and MIPS versions of the h edition are available for

sale now. One possibility is that there will be a demand for both MIPS and ARMv8

versions for future editions of the book, or there may even be a demand for a third

xviii Preface

version with yet another instruction set. We’ll cross that bridge when we come to it.

For now, we look forward to your reaction to and feedback on this eort.

Changes for the Fifth Edition

We had six major goals for the h edition of Computer Organization and Design:

demonstrate the importance of understanding hardware with a running example;

highlight main themes across the topics using margin icons that are introduced

early; update examples to reect changeover from PC era to post-PC era; spread

the material on I/O throughout the book rather than isolating it into a single

chapter; update the technical content to reect changes in the industry since the

publication of the fourth edition in 2009; and put appendices and optional sections

online instead of including a CD to lower costs and to make this edition viable as

an electronic book.

Before discussing the goals in detail, let’s look at the table on the next page.

It shows the hardware and soware paths through the material. Chapters1, 4,

5, and 6 are found on both paths, no matter what the experience or the focus.

Chapter1 discusses the importance of energy and how it motivates the switch

from single core to multicore microprocessors and introduces the eight great

ideas in computer architecture. Chapter2 is likely to be review material for the

hardware-oriented, but it is essential reading for the soware-oriented, especially

for those readers interested in learning more about compilers and object-oriented

programming languages. Chapter 3 is for readers interested in constructing a

datapath or in learning more about oating-point arithmetic. Some will skip

parts of Chapter3, either because they don’t need them, or because they oer

a review. However, we introduce the running example of matrix multiply in

this chapter, showing how subword parallels oers a fourfold improvement, so

don’t skip Sections 3.6 to 3.8. Chapter4 explains pipelined processors. Sections

4.1, 4.5, and 4.10 give overviews, and Section 4.12 gives the next performance

boost for matrix multiply for those with a soware focus. ose with a hardware

focus, however, will nd that this chapter presents core material; they may also,

depending on their background, want to read Appendix A on logic design rst.

e last chapter on multicores, multiprocessors, and clusters, is mostly new

content and should be read by everyone. It was signicantly reorganized in this

edition to make the ow of ideas more natural and to include much more depth

on GPUs, warehouse-scale computers, and the hardware–soware interface of

network interface cards that are key to clusters.

剩余1073页未读，继续阅读

huntwin

粉丝: 1
资源: 3

计算机组织与设计：ARM版——硬软件接口的经典教材

Computer Organization and Design The Hardware Software Interface ARM 无水印pdf

Computer Organization and Design (5th Edition).pdf

计算机结构习题答案 Computer+Organization+and+Design+（The Hardware/ Software interface 4th）3e+-+solutions

Computer Organization and Design_ RISC-V Edition

Computer Organization and Design 完整版带目录

计算机组成与设计硬件软件接口（英文版第4版ARM版）经典教材

计算机组成与设计硬件软件接口（英文版第4版ARM版）随书光盘

COMPUTER ORGANIZATION AND DESIGN.pdf

【路径规划】乌燕鸥算法栅格地图机器人最短路径规划【含Matlab仿真 2886期】.zip

【路径规划】生物地理算法栅格地图机器人最短路径规划【含Matlab仿真 2914期】.zip

最新资源