STM32L152超低功耗微控制器英文文档

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"STM32L152是ST公司的一款超低功耗微控制器，基于ARM Cortex-M3内核，适用于需要高效能和极低功耗的应用。该芯片具有丰富的特性，包括不同工作模式下的超低功耗设计、多种电源管理功能、多种时钟源选择以及内置的LCD、USB、ADC和DAC等外设。" STM32L152系列微控制器是STMicroelectronics在低功耗领域的杰出产品，其主要特点包括以下几个方面： 1. **超低功耗设计**：STM32L152可以在1.65V至3.6V的电源电压范围内工作，并支持多种功耗模式。例如，它在待机模式下可低至0.29μA（3个唤醒引脚），并且有RTC功能的待机模式下功耗仅为1.15μA。此外，还有0.44μA的停止模式（16个唤醒线路）和带有RTC的1.4μA停止模式。运行模式下的功耗也非常低，8.6μA的低功耗运行模式和185μA/MHz的正常运行模式。快速唤醒时间仅为8μs。 2. **高性能核心**：STM32L152采用ARM Cortex-M3 32位CPU，频率范围从32kHz到32MHz，提供33.3 DMIPS的性能。内建了内存保护单元（Memory Protection Unit, MPU），确保程序执行的安全性。 3. **电源和复位管理**：芯片内置低功耗的棕色输出复位（BOR）功能，有5个可选阈值，以及超低功耗的上电/掉电复位（POR/PDR）。还包含可编程电压检测器（PVD），增强了系统稳定性。 4. **时钟源**：STM32L152提供了灵活的时钟源选择，包括1到24MHz的晶体振荡器、用于RTC的32kHz振荡器（可校准）、16MHz的高精度内部RC振荡器（±1%误差）、低功耗37kHz内部RC振荡器以及一个可从65kHz到4.2MHz的多速低功耗PLL，用于CPU和其他外设。 5. **丰富的外设**：STM32L152集成了LCD控制器，支持低功耗显示需求；USB接口可以实现设备通信；高级模数转换器（ADC）和数模转换器（DAC）则为信号处理提供了硬件支持。此外，还有各种I/O端口，这些端口具有极低的漏电流（10nA），进一步降低了系统功耗。这款微控制器广泛应用于电池供电的物联网设备、健康监护设备、智能传感器、便携式电子设备等需要长时间工作的场合，其强大的低功耗特性和高效的处理能力使得STM32L152成为这类应用的理想选择。通过深入理解并充分利用这些特性，开发者可以创建出既节能又具备高性能的嵌入式系统。

Functional overview STM32L15xCC STM32L15xRC STM32L15xUC STM32L15xVC

16/133 DocID022799 Rev 7

Table 5. Functionalities depending on the working mode (from Run/active down to

standby)

Ips Run/Active Sleep

Low-

power

Run

Low-

power

Sleep

Stop Standby

Wakeup

capability

Wakeup

capability

CPU Y -- Y -- -- -- -- --

Flash Y Y Y Y -- -- -- --

RAM Y Y Y Y Y -- -- --

Backup Registers Y Y Y Y Y -- Y --

EEPROM Y Y Y Y Y -- -- --

Brown-out rest

(BOR)

YYYYYYY--

DMA Y Y Y Y -- -- -- --

Programmable

Voltage Detector

(PVD)

YYYYYYY--

Power On Reset

(POR)

YYYYYYY--

Power Down Rest

(PDR)

YYYYY--Y--

High Speed

Internal (HSI)

Y Y -- -- -- -- -- --

High Speed

External (HSE)

Y Y -- -- -- -- -- --

Low Speed Internal

(LSI)

YYYYY------

Low Speed

External (LSE)

YYYYY------

Multi-Speed

Internal (MSI)

Y Y Y Y -- -- -- --

Inter-Connect

Controller

Y Y Y Y -- -- -- --

RTC Y Y Y Y Y Y Y --

RTC Tamper Y Y Y Y Y Y Y Y

Auto WakeUp

(AWU)

YYYYYYYY

LCD Y Y Y Y Y -- -- --

USB Y Y -- -- -- Y -- --

USART Y Y Y Y Y

(1)

-- --

SPI Y Y Y Y -- -- -- --

I2C Y Y Y Y --

(1)

-- --

Functional overview STM32L15xCC STM32L15xRC STM32L15xUC STM32L15xVC

18/133 DocID022799 Rev 7

The memory protection unit (MPU) improves system reliability by defining the memory

attributes (such as read/write access permissions) for different memory regions. It provides

up to eight different regions and an optional predefined background region.

Owing to its embedded ARM core, the STM32L15xxC is compatible with all ARM tools and

software.

Nested vectored interrupt controller (NVIC)

The ultra-low-power STM32L15xxC embeds a nested vectored interrupt controller able to

handle up to 53 maskable interrupt channels (not including the 16 interrupt lines of ARM

Cortex-M3) and 16 priority levels.

• Closely coupled NVIC gives low-latency interrupt processing

• Interrupt entry vector table address passed directly to the core

• Closely coupled NVIC core interface

• Allows early processing of interrupts

• Processing of late arriving, higher-priority interrupts

• Support for tail-chaining

• Processor state automatically saved

• Interrupt entry restored on interrupt exit with no instruction overhead

This hardware block provides flexible interrupt management features with minimal interrupt

latency.

3.3 Reset and supply management

3.3.1 Power supply schemes

• V

= 1.65 to 3.6 V: external power supply for I/Os and the internal regulator. Provided

externally through V

pins.

• V

SSA

, V

DDA

= 1.65 to 3.6 V: external analog power supplies for ADC, reset blocks, RCs

and PLL (minimum voltage to be applied to V

DDA

is 1.8 V when the ADC is used). V

DDA

and V

SSA

must be connected to V

and V

, respectively.

3.3.2 Power supply supervisor

The device has an integrated ZEROPOWER power-on reset (POR)/power-down reset

(PDR) that can be coupled with a brownout reset (BOR) circuitry.

The device exists in two versions:

• The version with BOR activated at power-on operates between 1.8 V and 3.6 V.

• The other version without BOR operates between 1.65 V and 3.6 V.

After the V

threshold is reached (1.65 V or 1.8 V depending on the BOR which is active or

not at power-on), the option byte loading process starts, either to confirm or modify default

thresholds, or to disable the BOR permanently: in this case, the V

min value becomes

1.65 V (whatever the version, BOR active or not, at power-on).

When BOR is active at power-on, it ensures proper operation starting from 1.8 V whatever

the power ramp-up phase before it reaches 1.8 V. When BOR is not active at power-up, the

DocID022799 Rev 7 19/133

STM32L15xCC STM32L15xRC STM32L15xUC STM32L15xVC Functional overview

power ramp-up should guarantee that 1.65 V is reached on V

at least 1 ms after it exits

the POR area.

Five BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To

reduce the power consumption in Stop mode, it is possible to automatically switch off the

internal reference voltage (V

REFINT

) in Stop mode. The device remains in reset mode when

is below a specified threshold, V

POR/PDR

or V

BOR

, without the need for any external

reset circuit.

Note: The start-up time at power-on is typically 3.3 ms when BOR is active at power-up, the start-

up time at power-on can be decreased down to 1 ms typically for devices with BOR inactive

at power-up.

The device features an embedded programmable voltage detector (PVD) that monitors the

DDA

power supply and compares it to the V

PVD

threshold. This PVD offers 7 different

levels between 1.85 V and 3.05 V, chosen by software, with a step around 200 mV. An

interrupt can be generated when V

DDA

drops below the V

PVD

threshold and/or when

DDA

is higher than the V

PVD

threshold. The interrupt service routine can then generate

a warning message and/or put the MCU into a safe state. The PVD is enabled by software.

3.3.3 Voltage regulator

The regulator has three operation modes: main (MR), low-power (LPR) and power down.

• MR is used in Run mode (nominal regulation)

• LPR is used in the Low-power run, Low-power sleep and Stop modes

• Power down is used in Standby mode. The regulator output is high impedance, the

kernel circuitry is powered down, inducing zero consumption but the contents of the

registers and RAM are lost except for the standby circuitry (wakeup logic, IWDG, RTC,

LSI, LSE crystal 32K osc, RCC_CSR).

3.3.4 Boot modes

At startup, boot pins are used to select one of three boot options:

• Boot from Flash memory

• Boot from System memory

• Boot from embedded RAM

The boot loader is located in System memory. It is used to reprogram the Flash memory by

using USART1, USART2 or USB. See STM32™ microcontroller system memory boot mode

AN2606 for details.

Functional overview STM32L15xCC STM32L15xRC STM32L15xUC STM32L15xVC

20/133 DocID022799 Rev 7

3.4 Clock management

The clock controller distributes the clocks coming from different oscillators to the core and

the peripherals. It also manages clock gating for low-power modes and ensures clock

robustness. It features:

• Clock prescaler: to get the best trade-off between speed and current consumption, the

clock frequency to the CPU and peripherals can be adjusted by a programmable

prescaler.

• Safe clock switching: clock sources can be changed safely on the fly in run mode

through a configuration register.

• Clock management: to reduce power consumption, the clock controller can stop the

clock to the core, individual peripherals or memory.

• System clock source: three different clock sources can be used to drive the master

clock SYSCLK:

– 1-24 MHz high-speed external crystal (HSE), that can supply a PLL

– 16 MHz high-speed internal RC oscillator (HSI), trimmable by software, that can

supply a PLL

– Multispeed internal RC oscillator (MSI), trimmable by software, able to generate 7

frequencies (65 kHz, 131 kHz, 262 kHz, 524 kHz, 1.05 MHz, 2.1 MHz, 4.2 MHz).

When a 32.768 kHz clock source is available in the system (LSE), the MSI

frequency can be trimmed by software down to a ±0.5% accuracy.

• Auxiliary clock source: two ultra-low-power clock sources that can be used to drive

the LCD controller and the real-time clock:

– 32.768 kHz low-speed external crystal (LSE)

– 37 kHz low-speed internal RC (LSI), also used to drive the independent watchdog.

The LSI clock can be measured using the high-speed internal RC oscillator for

greater precision.

• RTC and LCD clock sources: the LSI, LSE or HSE sources can be chosen to clock

the RTC and the LCD, whatever the system clock.

• USB clock source: the embedded PLL has a dedicated 48 MHz clock output to supply

the USB interface.

• Startup clock: after reset, the microcontroller restarts by default with an internal 2 MHz

clock (MSI). The prescaler ratio and clock source can be changed by the application

program as soon as the code execution starts.

• Clock security system (CSS): this feature can be enabled by software. If a HSE clock

failure occurs, the master clock is automatically switched to HSI and a software

interrupt is generated if enabled.

• Clock-out capability (MCO: microcontroller clock output): it outputs one of the

internal clocks for external use by the application.

Several prescalers allow the configuration of the AHB frequency, each APB (APB1 and

APB2) domains. The maximum frequency of the AHB and the APB domains is 32 MHz. See

Figure 2 for details on the clock tree.

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