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首页Stellaris LM4F120H5QR 微控制器数据手册
"LM4F120H5QR是一款基于Tiva C系列的微控制器,由德州仪器(Texas Instruments)制造。该器件是Stellaris系列的一部分,具有强大的ARM Cortex-M4内核,专为嵌入式应用设计。这份DATASHEET提供了详细的技术规格和信息,对初学者和专业人士都具有很高的参考价值。"
LM4F120H5QR微控制器是Texas Instruments推出的Stellaris系列中的一个型号,它集成了高性能的32位ARM Cortex-M4处理器。Cortex-M4内核拥有浮点单元(FPU),可以高效地处理浮点运算,适用于需要实时控制和信号处理的应用。这个微控制器的设计旨在提供高能效、低功耗的解决方案,适用于各种嵌入式系统,包括工业控制、消费电子、汽车电子以及物联网设备等领域。
DATASHEET中详细介绍了LM4F120H5QR的特性,如内存配置、外设接口、时钟系统和电源管理。它通常包含以下关键部分:
1. **内存结构**:LM4F120H5QR可能包括闪存(Flash Memory)用于程序存储,SRAM(Static Random-Access Memory)作为工作内存,以及可能的EEPROM区域,用于非易失性数据存储。
2. **外设接口**:微控制器可能配备了多种通信接口,如I2C、SPI、UART、USB、CAN等,便于与其他设备进行数据交换。
3. **定时器和PWM**:包括通用定时器和PWM(脉宽调制)单元,用于定时任务、电机控制和信号生成。
4. **模拟功能**:可能包含了ADC(模数转换器)、DAC(数模转换器)以及比较器,支持模拟信号的处理。
5. **GPIO(通用输入/输出)**:可配置的引脚,可以作为输入或输出,用于控制外部设备或接收外部信号。
6. **电源管理**:具有灵活的电源模式,能够在保持低功耗的同时,满足不同应用场景的需求。
7. **安全特性**:可能包括加密引擎、看门狗定时器等,确保系统的稳定性和安全性。
8. **开发工具和支持**:TI提供的Tiva C系列开发工具和生态系统,如Energia IDE(基于Arduino的IDE)和Code Composer Studio,使得软件开发更加便捷。
这份DATASHEET的读者需要注意,由于是advance information,其中的技术规格和参数可能会随着产品的开发而更新。在实际应用中,开发者应当查阅最新的官方文档,以确保信息的准确性和兼容性。
LM4F120H5QR是一款强大的微控制器,它的广泛应用和详尽的技术资料使其成为学习和开发嵌入式系统的好选择。无论是对于初学者还是有经验的工程师,深入理解DATASHEET中的内容都能极大地提升项目开发效率和成功率。
Table 16-1. I2C Signals (64LQFP) ........................................................................................ 949
Table 16-2. Examples of I
2
C Master Timer Period versus Speed Mode ................................... 955
Table 16-3. Examples of I
2
C Master Timer Period in High-Speed Mode .................................. 955
Table 16-4. Inter-Integrated Circuit (I
2
C) Interface Register Map ............................................. 967
Table 16-5. Write Field Decoding for I2CMCS[3:0] Field ......................................................... 973
Table 17-1. Controller Area Network Signals (64LQFP) .......................................................... 998
Table 17-2. Message Object Configurations ........................................................................ 1003
Table 17-3. CAN Protocol Ranges ...................................................................................... 1011
Table 17-4. CANBIT Register Values .................................................................................. 1011
Table 17-5. CAN Register Map ........................................................................................... 1015
Table 18-1. USB Signals (64LQFP) .................................................................................... 1047
Table 18-2. Remainder (MAXLOAD/4) ................................................................................ 1053
Table 18-3. Actual Bytes Read ........................................................................................... 1053
Table 18-4. Packet Sizes That Clear RXRDY ...................................................................... 1053
Table 18-5. Universal Serial Bus (USB) Controller Register Map ........................................... 1054
Table 19-1. Analog Comparators Signals (64LQFP) ............................................................. 1104
Table 19-2. Internal Reference Voltage and ACREFCTL Field Values ................................... 1106
Table 19-3. Analog Comparator Voltage Reference Characteristics, V
DDA
= 3.3V, EN= 1, and
RNG = 0 .......................................................................................................... 1107
Table 19-4. Analog Comparator Voltage Reference Characteristics, V
DDA
= 3.3V, EN= 1, and
RNG = 1 .......................................................................................................... 1107
Table 19-5. Analog Comparators Register Map ................................................................... 1108
Table 21-1. GPIO Pins With Default Alternate Functions ...................................................... 1119
Table 21-2. Signals by Pin Number ..................................................................................... 1120
Table 21-3. Signals by Signal Name ................................................................................... 1125
Table 21-4. Signals by Function, Except for GPIO ............................................................... 1130
Table 21-5. GPIO Pins and Alternate Functions ................................................................... 1134
Table 21-6. Possible Pin Assignments for Alternate Functions .............................................. 1137
Table 21-7. Connections for Unused Signals (64-Pin LQFP) ................................................. 1139
Table 22-1. Temperature Characteristics ............................................................................. 1141
Table 22-2. Thermal Characteristics ................................................................................... 1141
Table 22-3. ESD Absolute Maximum Ratings ...................................................................... 1141
Table 23-1. Maximum Ratings ............................................................................................ 1142
Table 23-2. Recommended DC Operating Conditions .......................................................... 1143
Table 23-3. GPIO Current Restrictions ................................................................................ 1144
Table 23-4. GPIO Package Side Assignments ..................................................................... 1144
Table 23-5. JTAG Characteristics ....................................................................................... 1145
Table 23-6. Power Characteristics ...................................................................................... 1146
Table 23-7. Reset Characteristics ....................................................................................... 1147
Table 23-8. LDO Regulator Characteristics ......................................................................... 1148
Table 23-9. Phase Locked Loop (PLL) Characteristics ......................................................... 1149
Table 23-10. Actual PLL Frequency ...................................................................................... 1149
Table 23-11. PIOSC Clock Characteristics ............................................................................ 1150
Table 23-12. 30-kHz Clock Characteristics ............................................................................ 1150
Table 23-13. HIB Oscillator Input Characteristics ................................................................... 1150
Table 23-14. Main Oscillator Input Characteristics ................................................................. 1151
Table 23-15. Crystal Parameters .......................................................................................... 1153
Table 23-16. Supported MOSC Crystal Frequencies .............................................................. 1153
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Texas Instruments-Advance Information
Table of Contents
Table 23-17. System Clock Characteristics with ADC Operation ............................................. 1154
Table 23-18. System Clock Characteristics with USB Operation ............................................. 1154
Table 23-19. Sleep Modes AC Characteristics ....................................................................... 1155
Table 23-20. Hibernation Module Battery Characteristics ....................................................... 1155
Table 23-21. Hibernation Module AC Characteristics ............................................................. 1155
Table 23-22. Flash Memory Characteristics ........................................................................... 1156
Table 23-23. EEPROM Characteristics ................................................................................. 1156
Table 23-24. GPIO Module Characteristics ............................................................................ 1157
Table 23-25. ADC Electrical Characteristics .......................................................................... 1158
Table 23-26. SSI Characteristics .......................................................................................... 1160
Table 23-27. I
2
C Characteristics ........................................................................................... 1162
Table 23-28. Analog Comparator Characteristics ................................................................... 1162
Table 23-29. Analog Comparator Voltage Reference Characteristics ...................................... 1163
Table 23-30. Analog Comparator Voltage Reference Characteristics, V
DDA
= 3.3V, EN= 1, and
RNG = 0 .......................................................................................................... 1163
Table 23-31. Analog Comparator Voltage Reference Characteristics, V
DDA
= 3.3V, EN= 1, and
RNG = 1 .......................................................................................................... 1163
Table 23-32. Preliminary Current Consumption ..................................................................... 1164
Table B-1. Part Ordering Information ................................................................................. 1208
17August 29, 2012
Texas Instruments-Advance Information
Stellaris
®
LM4F120H5QR Microcontroller
List of Registers
The Cortex-M4F Processor ........................................................................................................... 64
Register 1: Cortex General-Purpose Register 0 (R0) ........................................................................... 72
Register 2: Cortex General-Purpose Register 1 (R1) ........................................................................... 72
Register 3: Cortex General-Purpose Register 2 (R2) ........................................................................... 72
Register 4: Cortex General-Purpose Register 3 (R3) ........................................................................... 72
Register 5: Cortex General-Purpose Register 4 (R4) ........................................................................... 72
Register 6: Cortex General-Purpose Register 5 (R5) ........................................................................... 72
Register 7: Cortex General-Purpose Register 6 (R6) ........................................................................... 72
Register 8: Cortex General-Purpose Register 7 (R7) ........................................................................... 72
Register 9: Cortex General-Purpose Register 8 (R8) ........................................................................... 72
Register 10: Cortex General-Purpose Register 9 (R9) ........................................................................... 72
Register 11: Cortex General-Purpose Register 10 (R10) ....................................................................... 72
Register 12: Cortex General-Purpose Register 11 (R11) ........................................................................ 72
Register 13: Cortex General-Purpose Register 12 (R12) ....................................................................... 72
Register 14: Stack Pointer (SP) ........................................................................................................... 73
Register 15: Link Register (LR) ............................................................................................................ 74
Register 16: Program Counter (PC) ..................................................................................................... 75
Register 17: Program Status Register (PSR) ........................................................................................ 76
Register 18: Priority Mask Register (PRIMASK) .................................................................................... 80
Register 19: Fault Mask Register (FAULTMASK) .................................................................................. 81
Register 20: Base Priority Mask Register (BASEPRI) ............................................................................ 82
Register 21: Control Register (CONTROL) ........................................................................................... 83
Register 22: Floating-Point Status Control (FPSC) ................................................................................ 85
Cortex-M4 Peripherals ................................................................................................................. 117
Register 1: SysTick Control and Status Register (STCTRL), offset 0x010 ........................................... 133
Register 2: SysTick Reload Value Register (STRELOAD), offset 0x014 .............................................. 135
Register 3: SysTick Current Value Register (STCURRENT), offset 0x018 ........................................... 136
Register 4: Interrupt 0-31 Set Enable (EN0), offset 0x100 .................................................................. 137
Register 5: Interrupt 32-63 Set Enable (EN1), offset 0x104 ................................................................ 137
Register 6: Interrupt 64-95 Set Enable (EN2), offset 0x108 ................................................................ 137
Register 7: Interrupt 96-127 Set Enable (EN3), offset 0x10C ............................................................. 137
Register 8: Interrupt 128-138 Set Enable (EN4), offset 0x110 ............................................................ 138
Register 9: Interrupt 0-31 Clear Enable (DIS0), offset 0x180 .............................................................. 139
Register 10: Interrupt 32-63 Clear Enable (DIS1), offset 0x184 ............................................................ 139
Register 11: Interrupt 64-95 Clear Enable (DIS2), offset 0x188 ............................................................ 139
Register 12: Interrupt 96-127 Clear Enable (DIS3), offset 0x18C .......................................................... 139
Register 13: Interrupt 128-138 Clear Enable (DIS4), offset 0x190 ........................................................ 140
Register 14: Interrupt 0-31 Set Pending (PEND0), offset 0x200 ........................................................... 141
Register 15: Interrupt 32-63 Set Pending (PEND1), offset 0x204 ......................................................... 141
Register 16: Interrupt 64-95 Set Pending (PEND2), offset 0x208 ......................................................... 141
Register 17: Interrupt 96-127 Set Pending (PEND3), offset 0x20C ....................................................... 141
Register 18: Interrupt 128-138 Set Pending (PEND4), offset 0x210 ...................................................... 142
Register 19: Interrupt 0-31 Clear Pending (UNPEND0), offset 0x280 ................................................... 143
Register 20: Interrupt 32-63 Clear Pending (UNPEND1), offset 0x284 .................................................. 143
Register 21: Interrupt 64-95 Clear Pending (UNPEND2), offset 0x288 .................................................. 143
August 29, 201218
Texas Instruments-Advance Information
Table of Contents
Register 22: Interrupt 96-127 Clear Pending (UNPEND3), offset 0x28C ............................................... 143
Register 23: Interrupt 128-138 Clear Pending (UNPEND4), offset 0x290 .............................................. 144
Register 24: Interrupt 0-31 Active Bit (ACTIVE0), offset 0x300 ............................................................. 145
Register 25: Interrupt 32-63 Active Bit (ACTIVE1), offset 0x304 ........................................................... 145
Register 26: Interrupt 64-95 Active Bit (ACTIVE2), offset 0x308 ........................................................... 145
Register 27: Interrupt 96-127 Active Bit (ACTIVE3), offset 0x30C ........................................................ 145
Register 28: Interrupt 128-138 Active Bit (ACTIVE4), offset 0x310 ....................................................... 146
Register 29: Interrupt 0-3 Priority (PRI0), offset 0x400 ......................................................................... 147
Register 30: Interrupt 4-7 Priority (PRI1), offset 0x404 ......................................................................... 147
Register 31: Interrupt 8-11 Priority (PRI2), offset 0x408 ....................................................................... 147
Register 32: Interrupt 12-15 Priority (PRI3), offset 0x40C .................................................................... 147
Register 33: Interrupt 16-19 Priority (PRI4), offset 0x410 ..................................................................... 147
Register 34: Interrupt 20-23 Priority (PRI5), offset 0x414 ..................................................................... 147
Register 35: Interrupt 24-27 Priority (PRI6), offset 0x418 ..................................................................... 147
Register 36: Interrupt 28-31 Priority (PRI7), offset 0x41C .................................................................... 147
Register 37: Interrupt 32-35 Priority (PRI8), offset 0x420 ..................................................................... 147
Register 38: Interrupt 36-39 Priority (PRI9), offset 0x424 ..................................................................... 147
Register 39: Interrupt 40-43 Priority (PRI10), offset 0x428 ................................................................... 147
Register 40: Interrupt 44-47 Priority (PRI11), offset 0x42C ................................................................... 147
Register 41: Interrupt 48-51 Priority (PRI12), offset 0x430 ................................................................... 147
Register 42: Interrupt 52-55 Priority (PRI13), offset 0x434 ................................................................... 147
Register 43: Interrupt 56-59 Priority (PRI14), offset 0x438 ................................................................... 147
Register 44: Interrupt 60-63 Priority (PRI15), offset 0x43C .................................................................. 147
Register 45: Interrupt 64-67 Priority (PRI16), offset 0x440 ................................................................... 149
Register 46: Interrupt 68-71 Priority (PRI17), offset 0x444 ................................................................... 149
Register 47: Interrupt 72-75 Priority (PRI18), offset 0x448 ................................................................... 149
Register 48: Interrupt 76-79 Priority (PRI19), offset 0x44C .................................................................. 149
Register 49: Interrupt 80-83 Priority (PRI20), offset 0x450 ................................................................... 149
Register 50: Interrupt 84-87 Priority (PRI21), offset 0x454 ................................................................... 149
Register 51: Interrupt 88-91 Priority (PRI22), offset 0x458 ................................................................... 149
Register 52: Interrupt 92-95 Priority (PRI23), offset 0x45C .................................................................. 149
Register 53: Interrupt 96-99 Priority (PRI24), offset 0x460 ................................................................... 149
Register 54: Interrupt 100-103 Priority (PRI25), offset 0x464 ............................................................... 149
Register 55: Interrupt 104-107 Priority (PRI26), offset 0x468 ............................................................... 149
Register 56: Interrupt 108-111 Priority (PRI27), offset 0x46C ............................................................... 149
Register 57: Interrupt 112-115 Priority (PRI28), offset 0x470 ................................................................ 149
Register 58: Interrupt 116-119 Priority (PRI29), offset 0x474 ................................................................ 149
Register 59: Interrupt 120-123 Priority (PRI30), offset 0x478 ............................................................... 149
Register 60: Interrupt 124-127 Priority (PRI31), offset 0x47C ............................................................... 149
Register 61: Interrupt 128-131 Priority (PRI32), offset 0x480 ............................................................... 149
Register 62: Interrupt 132-135 Priority (PRI33), offset 0x484 ............................................................... 149
Register 63: Interrupt 136-138 Priority (PRI34), offset 0x488 ............................................................... 149
Register 64: Software Trigger Interrupt (SWTRIG), offset 0xF00 .......................................................... 151
Register 65: Auxiliary Control (ACTLR), offset 0x008 .......................................................................... 152
Register 66: CPU ID Base (CPUID), offset 0xD00 ............................................................................... 154
Register 67: Interrupt Control and State (INTCTRL), offset 0xD04 ........................................................ 155
Register 68: Vector Table Offset (VTABLE), offset 0xD08 .................................................................... 158
Register 69: Application Interrupt and Reset Control (APINT), offset 0xD0C ......................................... 159
19August 29, 2012
Texas Instruments-Advance Information
Stellaris
®
LM4F120H5QR Microcontroller
Register 70: System Control (SYSCTRL), offset 0xD10 ....................................................................... 161
Register 71: Configuration and Control (CFGCTRL), offset 0xD14 ....................................................... 163
Register 72: System Handler Priority 1 (SYSPRI1), offset 0xD18 ......................................................... 165
Register 73: System Handler Priority 2 (SYSPRI2), offset 0xD1C ........................................................ 166
Register 74: System Handler Priority 3 (SYSPRI3), offset 0xD20 ......................................................... 167
Register 75: System Handler Control and State (SYSHNDCTRL), offset 0xD24 .................................... 168
Register 76: Configurable Fault Status (FAULTSTAT), offset 0xD28 ..................................................... 172
Register 77: Hard Fault Status (HFAULTSTAT), offset 0xD2C .............................................................. 178
Register 78: Memory Management Fault Address (MMADDR), offset 0xD34 ........................................ 179
Register 79: Bus Fault Address (FAULTADDR), offset 0xD38 .............................................................. 180
Register 80: MPU Type (MPUTYPE), offset 0xD90 ............................................................................. 181
Register 81: MPU Control (MPUCTRL), offset 0xD94 .......................................................................... 182
Register 82: MPU Region Number (MPUNUMBER), offset 0xD98 ....................................................... 184
Register 83: MPU Region Base Address (MPUBASE), offset 0xD9C ................................................... 185
Register 84: MPU Region Base Address Alias 1 (MPUBASE1), offset 0xDA4 ....................................... 185
Register 85: MPU Region Base Address Alias 2 (MPUBASE2), offset 0xDAC ...................................... 185
Register 86: MPU Region Base Address Alias 3 (MPUBASE3), offset 0xDB4 ....................................... 185
Register 87: MPU Region Attribute and Size (MPUATTR), offset 0xDA0 ............................................... 187
Register 88: MPU Region Attribute and Size Alias 1 (MPUATTR1), offset 0xDA8 .................................. 187
Register 89: MPU Region Attribute and Size Alias 2 (MPUATTR2), offset 0xDB0 .................................. 187
Register 90: MPU Region Attribute and Size Alias 3 (MPUATTR3), offset 0xDB8 .................................. 187
Register 91: Coprocessor Access Control (CPAC), offset 0xD88 .......................................................... 190
Register 92: Floating-Point Context Control (FPCC), offset 0xF34 ........................................................ 191
Register 93: Floating-Point Context Address (FPCA), offset 0xF38 ...................................................... 193
Register 94: Floating-Point Default Status Control (FPDSC), offset 0xF3C ........................................... 194
System Control ............................................................................................................................ 207
Register 1: Device Identification 0 (DID0), offset 0x000 ..................................................................... 230
Register 2: Device Identification 1 (DID1), offset 0x004 ..................................................................... 232
Register 3: Brown-Out Reset Control (PBORCTL), offset 0x030 ........................................................ 234
Register 4: Raw Interrupt Status (RIS), offset 0x050 .......................................................................... 235
Register 5: Interrupt Mask Control (IMC), offset 0x054 ...................................................................... 237
Register 6: Masked Interrupt Status and Clear (MISC), offset 0x058 .................................................. 239
Register 7: Reset Cause (RESC), offset 0x05C ................................................................................ 241
Register 8: Run-Mode Clock Configuration (RCC), offset 0x060 ......................................................... 243
Register 9: GPIO High-Performance Bus Control (GPIOHBCTL), offset 0x06C ................................... 247
Register 10: Run-Mode Clock Configuration 2 (RCC2), offset 0x070 .................................................... 249
Register 11: Main Oscillator Control (MOSCCTL), offset 0x07C ........................................................... 252
Register 12: Deep Sleep Clock Configuration (DSLPCLKCFG), offset 0x144 ........................................ 253
Register 13: System Properties (SYSPROP), offset 0x14C .................................................................. 255
Register 14: Precision Internal Oscillator Calibration (PIOSCCAL), offset 0x150 ................................... 256
Register 15: Precision Internal Oscillator Statistics (PIOSCSTAT), offset 0x154 .................................... 258
Register 16: PLL Frequency 0 (PLLFREQ0), offset 0x160 ................................................................... 259
Register 17: PLL Frequency 1 (PLLFREQ1), offset 0x164 ................................................................... 260
Register 18: PLL Status (PLLSTAT), offset 0x168 ............................................................................... 261
Register 19: Watchdog Timer Peripheral Present (PPWD), offset 0x300 ............................................... 262
Register 20: 16/32-Bit General-Purpose Timer Peripheral Present (PPTIMER), offset 0x304 ................. 263
Register 21: General-Purpose Input/Output Peripheral Present (PPGPIO), offset 0x308 ........................ 265
Register 22: Micro Direct Memory Access Peripheral Present (PPDMA), offset 0x30C .......................... 268
August 29, 201220
Texas Instruments-Advance Information
Table of Contents
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