ARMv8架构参考手册:ARM公司版权

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"这是一份ARMv8架构参考手册的 Beta版,由ARM Limited发布,版权日期为2013年和2014年。手册详细介绍了ARMv8架构,特别是针对ARMv8-A架构的特性。" ARMv8架构是ARM公司设计的一种64位指令集架构(ISA),它是ARM处理器发展的重要里程碑,首次引入了对64位计算的支持。ARMv8-A架构主要面向服务器、高性能计算和移动设备等市场,提供了高效能与能效的平衡。 本手册作为参考指南,通常会包含以下几个方面的详细内容: 1. **架构概述**:介绍ARMv8-A架构的基本设计理念,包括其64位扩展(AArch64状态)以及与前代32位架构(ARM状态)的关系。 2. **指令集**:详述ARMv8-A架构的指令集,包括基础指令、浮点运算指令、向量处理指令(如NEON和ASIMD)、系统管理指令等。 3. **寄存器组织**:描述处理器中的各种寄存器,如通用寄存器、程序计数器、链接寄存器、状态寄存器(如xPACR, xPSR)等,以及它们在64位模式下的扩展。 4. **内存模型**:涵盖内存层次结构、地址空间布局、缓存一致性协议、虚拟内存机制(如页表和页大小)。 5. **异常和中断处理**:解释如何处理硬件中断、软件中断、数据和预取异常,以及异常向量表的组织。 6. **处理器模式**:列出不同运行模式,如用户模式、系统模式、中断处理模式等,以及模式间的切换规则。 7. **系统接口**:描述系统级接口,如系统控制寄存器(System Control Register, SCS)、中断控制器(Interrupt Controller)、调试接口等。 8. **安全和虚拟化特性**:介绍ARMv8-A的TrustZone技术、虚拟化扩展(如Hypervisor Mode和Virtual Machine Extensions)等安全和隔离特性。 9. **二进制兼容性**:说明如何实现与32位ARMv7-A架构的二进制兼容,包括AAPCS(ARM Application Procedure Call Standard)和AAPCS64。 10. **开发工具支持**:可能涵盖编译器、调试器和其他开发工具对ARMv8-A架构的支持情况。 请注意,由于这是Beta版文档,其中可能包含未公开的特性或待定的设计决策,因此实际产品可能有所不同。同时,ARM明确指出,该文档的使用须遵守版权规定,未经许可不得复制或用于非授权目的。使用该文档进行开发时,需遵守ARM的知识产权政策。
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This manual describes the ARM® architecture v8, ARMv8. The architecture describes the operation of an ARMv8-A Processing element (PE), and this manual includes descriptions of: • The two Execution states, AArch64 and AArch32. • The instruction sets: — In AArch32 state, the A32 and T32 instruction sets, that are compatible with earlier versions of the ARM architecture. — In AArch64 state, the A64 instruction set. • The states that determine how a PE operates, including the current Exception level and Security state, and in AArch32 state the PE mode. • The Exception model. • The interprocessing model, that supports transitioning between AArch64 state and AArch32 state. • The memory model, that defines memory ordering and memory management. This manual covers a single architecture profile, ARMv8-A, that defines a Virtual Memory System Architecture (VMSA). • The programmers’ model, and its interfaces to System registers that control most PE and memory system features, and provide status information. • The Advanced SIMD and floating-point instructions, that provide high-performance: — Single-precision and double-precision floating-point operations. — Conversions between double-precision, single-precision, and half-precision floating-point values. — Integer, single-precision floating-point, and in A64, double-precision vector operations in all instruction sets. — Double-precision floating-point vector operations in the A64 instruction set. • The security model, that provides two security states to support secure applications. • The virtualization model, that support the virtualization of Non-secure operation. • The Debug architecture, that provides software access to debug features.