Energy Efficient RRAM Spiking Neural Network for
Real Time Classification
Yu Wang
1
, Tianqi Tang
1
, Lixue Xia
1
, Boxun Li
1
, Peng Gu
1
, Hai Li
2
, Yuan Xie
3
, Huazhong Yang
1
1
Dept. of E.E., Tsinghua National Laboratory for Information Science and Technology (TNList),
Centre for Brain Inspired Computing Research (CBICR), Tsinghua University, Beijing, China
2
Dept. of E.C.E., University of Pittsburgh, Pittsburgh, USA
3
Dept. of E.C.E., University of Califor nia at Santa Barbara, Califor nia, USA
e-mail: yu-wang@mail.tsinghua.edu.cn
ABSTRACT
Inspired by the human brain’s function and efficiency, neuro-
morphic computing offers a promising solution for a wide set
of tasks, ranging from brain machine interfaces to real-time
classification. The spiking neural network (SNN), which en-
codes and processes information with bionic spikes, is an
emerging neuromorphic model with great potential to dras-
tically promote the performance and efficiency of comput-
ing systems. However, an energy efficient hardware imple-
mentation and the difficulty of training the model signifi-
cantly limit the application of the spiking neural network.
In this work, we address these issues by building an SNN-
based energy efficient system for real time classification with
metal-oxide resistive switching random-access memory (R-
RAM) devices. We implement different training algorithms
of SNN, including Spiking Time Dependent Plasticity (STD-
P) and Neural Sampling method. Our RRAM SNN systems
for these two training algorithms show good power efficiency
and recognition performance on realtime classification tasks,
such as the MNIST digit recognition. Finally, we propose a
possible direction to further improve the classification accu-
racy by boosting multiple SNNs.
1. INTRODUCTION
The era of Big Data brings new chances and new chal-
lenges in many fields especially for the applications need-
ing real-time data processing such as the EEG classification,
tracking, etc[1, 2]. These applications demonstrate huge de-
mands for more powerful platforms with higher processing
speed, lower energy consumption, and more intelligent min-
ing algorithms. However, the classic “scaling down” method
is approaching the limit, making it more and more difficult
for CMOS-based computing systems to achieve considerable
improvements from the device scaling [3]. Moreover, the
memory bandwidth required by high-performance CPUs has
also increased beyond what conventional memory architec-
tures can efficiently provide, leading to an ever-increasing
“memory wall” challenge to the efficiency of von Neumann
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architecture. Therefore, innovation in both device technolo-
gy and computing architecture is required to overcome these
challenges.
The spiking neural network (SNN) is an emerging model
which encodes and processes information with sparse time-
encoded neural signals in parallel [4]. As a bio-inspired ar-
chitecture abstracted from actual neural system, SNN not
only provides a promising solution to deal with cognitive
tasks, such as the object detection and speech recognition,
but also inspires new computational paradigms beyond the
von Neumann architecture and boolean logics, which can
drastically promote the performance and efficiency of com-
puting systems [5, 6].
However, an energy efficient hardware implementation and
the difficulty of training the model remain as two important
impediments that limit the application of the spiking neural
network.
On the one hand, we need an applicable computing plat-
form to utilize the potential ability of SNN. IBM proposes
a neurosynaptic core named TrueNorth [7]. To mimic the
ultra-low-power processing of brain, TrueNorth uses several
approaches to reduce the power consumption. Specifically,
TrueNorth uses digital messages between neurons to reduce
the communication overhead and event-driven strategy to
further save the energy computation [6]. However, the C-
MOS based implementation still has some limitations that
are hard to avoid, while some RRAM’s inherent advantages
can overcome these difficulties. First, on-chip SRAM, where
the synapse information is stored, is a kind of volatile mem-
ory with considerable leakage power, while RRAM is non-
volatile with very low leakage power [8]. Another limitation
is that TrueNorth may still needs adders to provide the addi-
tion operation of neuron function, but RRAM crossbar can
do the addition, or the matrix-vector multiplication, with
ultra-high energy efficiency by naturally combing the com-
putation and memory together [9, 10, 11]. Consequently,
RRAM shows potential on implementing low-power spiking
neural network.
On the other hand, from the perspective of algorithm, the
efficient training of SNN and mapping a trained SNN onto
neuromorphic hardware presents unique challenges. Recen-
t work of SNN mainly focuses on increasing the scalability
and level of realism in neural simulation by modeling and
simulating thousands to billions of neurons in biological re-
al time [12, 13]. These techniques provide promising tools
to study the brain but few of them support practical cogni-
tive applications, such as the handwritten digit recognition.
Even TrueNorth [10] uses seven kinds of applications to ver-