微芯片技术的93XX46系列：低功耗串行EEPROM特性与应用
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"这篇文档是关于Microchip Technology Inc.生产的几种1Kbit低电压串行电可擦除只读存储器（EEPROM）芯片的详细资料，包括93AA46A/B/C, 93LC46A/B/C, 和 93C46A/B/C型号。这些芯片具有低功耗的CMOS技术、自动擦除/写入功能以及数据保护电路等特性，适用于需要序列读取和低功耗操作的应用场景。"
在本文档中，重点介绍了几个关键知识点：
1. **芯片系列与组织结构**：93XX46系列芯片分为'AA'和'LC/C'两种版本，不同之处在于它们的组织结构和功能。'A'版本的设备如93AA46A，具有128x8-bit的组织结构；而'B'版本如93AA46B则有64x16-bit的组织结构。'C'版本的设备如93AA46C，其word大小可以通过外部逻辑电平控制的ORG引脚选择。
2. **低功耗CMOS技术**：这些芯片采用CMOS（互补金属氧化物半导体）技术，确保了在运行时的低功耗，适合电池供电或能量受限的系统。
3. **自动操作功能**：芯片提供了自我定时的擦除/写入周期，包括自动擦除功能。在写入操作前，会自动执行擦除（ERASE）操作，这简化了编程流程并提高了可靠性。
4. **电源保护**：每个设备都内置了电源-on/off数据保护电路，确保在电源状态变化时，存储的数据仍然安全。
5. **3线串行I/O接口**：这些设备遵循工业标准的3线串行接口，包含设备状态信号（READY/BUSY），使得用户能够监控设备是否准备好进行通信。
6. **序列读取功能**：支持连续读取操作，这对于需要连续读取大量数据的应用非常有用。
7. **耐久性和数据保留**：芯片可以承受1,000,000次的擦写循环，数据保留时间超过200年，这表明它们在长期使用中的稳定性和可靠性。
8. **温度范围**：这些芯片支持各种工作温度范围，增加了其在不同环境条件下的适用性。
这些特性使得93XX46系列芯片成为嵌入式系统、物联网设备、便携式设备以及其他需要高效能、低功耗存储解决方案的场合的理想选择。学习这些芯片的工作原理和应用方法，对于理解和设计涉及此类存储技术的项目至关重要。
2003 Microchip Technology Inc. DS21749D-page 5
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.0 FUNCTIONAL DESCRIPTION
When the ORG* pin is connected to VCC, the (x16)
organization is selected. When it is connected to
ground, the (x8) organization is selected. Instructions,
addresses and write data are clocked into the DI pin on
the rising edge of the clock (CLK). The DO pin is
normally held in a HIGH-Z state except when reading
data from the device, or when checking the READY/
BUSY
status during a programming operation. The
READY/BUSY
status can be verified during an Erase/
Write operation by polling the DO pin; DO low indicates
that programming is still in progress, while DO high
indicates the device is ready. DO will enter the HIGH-Z
state on the falling edge of CS.
2.1 Start Condition
The Start bit is detected by the device if CS and DI are
both high with respect to the positive edge of CLK for
the first time.
Before a Start condition is detected, CS, CLK, and DI
may change in any combination (except to that of a
Start condition), without resulting in any device
operation (READ, WRITE, ERASE, EWEN, EWDS,
ERAL, or WRAL). As soon as CS is high, the device is
no longer in Standby mode.
An instruction following a Start condition will only be
executed if the required opcode, address and data bits
for any particular instruction are clocked in.
2.2 Data In/Data Out (DI/DO)
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the READ operation, if A0 is a logic high
level. Under such a condition the voltage level seen at
Data Out is undefined and will depend upon the relative
impedances of Data Out and the signal source driving
A0. The higher the current sourcing capability of A0,
the higher the voltage at the Data Out pin. In order to
limit this current, a resistor should be connected
between DI and DO.
2.3 Data Protection
All modes of operation are inhibited when VCC is below
a typical voltage of 1.5V for '93AA' and '93LC' devices
or 3.8V for '93C' devices.
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
Note: For added protection, an EWDS command
should be performed after every write
operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWEN instruction must be
performed before the initial ERASE or WRITE instruction
can be executed.
Block Diagram
Memory
Array
Data Register
Mode
Decode
Logic
Clock
Register
Address
Decoder
Address
Counter
Output
Buffer
DO
DI
ORG*
CS
CLK
V
CC VSS
*ORG input is not available on A/B devices
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