TI官方TVP5150数字音频视频数据手册：2003年9月版

需积分: 10 147 浏览量更新于2024-07-21 收藏 355KB PDF 举报

TVP5150资料是由德州仪器公司（Texas Instruments Incorporated）官方发布的详细文档，针对音频视频开发人员，特别是那些关注HPADigitalAudioVideo技术的工程师。这份SLES087数据手册发布于2003年9月，提供了关于TVP5150芯片的关键信息和规格。该文档强调了重要的注意事项，即TI保留在任何时候对产品性能、功能、改进或停止提供服务的权利，因此在下订单前，用户应确保获取最新且完整的产品信息，并确认其时效性。TVP5150芯片的销售受TI当时提供的销售条款和条件约束。 TI对其硬件产品的性能保修承诺基于销售时适用的规格，通过测试和质量控制措施来支持这一承诺。然而，并非所有产品的所有参数都经过了全面测试，除非政府有强制要求。这意味着开发者需要自行负责应用支持和客户产品设计，因为这超出了TI的保修范围。 TVP5150资料的内容可能涵盖了芯片的功能特性、接口规格、工作原理、编程接口、性能指标、驱动程序指导、示例电路图以及潜在的应用案例。对于音频视频开发项目而言，这份资料是理解TVP5150芯片特性和优化系统性能的关键资源，有助于工程师们设计高效、稳定的多媒体解决方案。阅读和理解TVP5150资料对于从事相关领域的开发者来说，是一项必不可少的任务，它提供了深入的技术细节，帮助他们充分利用这款芯片的能力，同时了解可能遇到的挑战和局限性。在实际项目中，结合最新的产品信息和技术更新，将有助于实现更高质量的音频视频产品设计。

2−1

2 Functional Description

2.1 Analog Front End

The TVP5150A decoder has an analog input channel that accepts two video inputs, which are ac-coupled. The

decoder supports a maximum input voltage range of 0.75 V; therefore, an attenuation of one-half is needed for most

input signals with a peak-to-peak variation of 1.5 V. The maximum parallel termination before the input to the device

is 75 Ω. The two analog input ports can be connected as follows:

• Two selectable composite video inputs or

• One S-video input

An internal clamping circuit restores the ac-coupled video signal to a fixed dc level.

The programmable gain amplifier (PGA) and the AGC circuit work together to make sure that the input signal is

amplified sufficiently to ensure the proper input range for the ADC.

The ADC has 9 bits of resolution and runs at a maximum speed of 27 MHz. The clock input for the ADC comes from

the PLL.

2.2 Composite Processing Block Diagram

The composite processing block processes NTSC/PAL/SECAM signals into the YCbCr color space. Figure 2−1

explains the basic architecture of this processing block.

Figure 2−1 illustrates the luminance/chrominance (Y/C) separation process in the TVP5150A decoder. The

composite video is multiplied by subcarrier signals in the quadrature modulator to generate the color difference

signals Cb and Cr. Cb and Cr are then low-pass (LP) filtered to achieve the desired bandwidth and to reduce crosstalk.

An adaptive 4-line comb filter separates CbCr from Y. Chroma is remodulated through another quadrature modulator

and subtracted from the line-delayed composite video to generate luma. Contrast, brightness, hue, saturation, and

sharpness (using the peaking filter) are programmable via I

The Y/C separation is bypassed for S-video input. For S-video, the remodulation path is disabled.

2.3 Adaptive Comb Filtering

The 4-line comb filter can be selectively bypassed in the luma or chroma path. If the comb filter is bypassed in the

luma path, then chroma notch filters are used. TI’s patented adaptive 4-line comb filter algorithm reduces artifacts

such as hanging dots at color boundaries and detects and properly handles false colors in high frequency luminance

images such as a multiburst pattern or circle pattern.

2.4 Color Low-Pass Filter

In some applications, it is desirable to limit the Cb/Cr bandwidth to avoid crosstalk. This is especially true in case of

video signals that have asymmetrical Cb/Cr sidebands. The color LP filters provided limit the bandwidth of the Cb/Cr

signals.

Color LP filters are needed when the comb filtering turns off, due to extreme color transitions in the input image.

Please refer to Section 2.20.26, Chrominance Control #2 Register, for the response of these filters. The filters have

three options that allow three different frequency responses based on the color frequency characteristics of the input

video.

2−4

At powerup the host interface is required to program the VDP-configuration RAM (VDP-CRAM) contents with the

lookup table (see Section 2.20.58). This is done through port address C3h. Each read from or write to this address

will auto increment an internal counter to the next RAM location. To access the VDP-CRAM, the line mode registers

(D0h−FCh) must be programmed with FFh to avoid a conflict with the internal microprocessor and the VDP in both

writing and reading. Full field mode must also be disabled.

Available VBI lines are from line 6 to line 27 of both field 1 and field 2. Each line can be any VBI mode.

Output data is available either through the VBI-FIFO (B0h) or through dedicated registers at 90h−AFh, both of which

are available through the I

C port.

2.9 VBI FIFO and Ancillary Data in Video Stream

Sliced VBI data can be output as ancillary data in the video stream in the ITU-R BT.656 mode. VBI data is output during

the horizontal blanking period following the line from which the data was retrieved. Table 2−2 shows the header format

and sequence of the ancillary data inserted into the video stream. This format is also used to store any VBI data into

the FIFO. The size of FIFO is 512 bytes. Therefore, the FIFO can store up to 11 lines of teletext data with the NTSC

NABTS standard.

Table 2−2. Ancillary Data Format and Sequence

BYTE

NO.

(MSB)

D6 D5 D4 D3 D2 D1 D0

(LSB)

DESCRIPTION

0 0 0 0 0 0 0 0 0

Ancillary data preamble

1 1 1 1 1 1 1 1 1

Ancillary data preamble

2 1 1 1 1 1 1 1 1

3 NEP EP 0 1 0 DID2 DID1 DID0 Data ID (DID)

4 NEP EP F5 F4 F3 F2 F1 F0 Secondary data ID (SDID)

5 NEP EP N5 N4 N3 N2 N1 N0 Number of 32 bit data (NN)

6 Video line # [7:0] Internal data ID0 (IDID0)

7 0 0 0 Data

error

Match

Video line # [9:8] Internal data ID1 (IDID1)

8 1. Data Data byte

word

9 2. Data Data byte

1 word

10 3. Data Data byte

11 4. Data Data byte

: : :

m−1. Data Data byte

word

m. Data Data byte

N word

NEP EP CS[5:0] Check sum

4(N+2)−1 1 0 0 0 0 0 0 0 Fill byte

EP: Even parity for D0−D5 NEP: Negated even parity

DID: 91h: Sliced data of VBI lines of first field

53h: Sliced data of line 24 to end of first field

55h: Sliced data of VBI lines of second field

97h: Sliced data of line 24 to end of second field

SDID: This field holds the data format taken from the line mode register of the corresponding line.

NN: Number of Dwords beginning with byte 8 through 4(N+2). This value is the number of Dwords where

each Dword is 4 bytes.

IDID0: Transaction video line number [7:0]

剩余71页未读，继续阅读

gerway

粉丝: 0
资源: 1

TI官方TVP5150数字音频视频数据手册：2003年9月版

TVP5150最全的调试资料

关于TVP5150AM1视频采集模块设计

tvp5150 verilog

tvp5150 程序

python tvp-favar

stata做tvp-var

jouchinakajima的tvpvar

tvp-var模型代码matlab

tvp-sv-var

tvp-var模型代码

最新资源

tvp5150　verilog