MAX30100心率传感器代码实现

/*
 * max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor
 *
 * Copyright (C) 2015 Matt Ranostay <mranostay@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * TODO: enable pulse length controls via device tree properties
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>

#include <linux/iio/kfifo_buf.h>

#define MAX30100_REGMAP_NAME "max30100_regmap"
#define MAX30100_DRV_NAME "max30100"

#define MAX30100_REG_INT_STATUS 0x00
#define MAX30100_REG_INT_STATUS_PWR_RDY BIT(0)
#define MAX30100_REG_INT_STATUS_SPO2_RDY BIT(4)
#define MAX30100_REG_INT_STATUS_HR_RDY BIT(5)
#define MAX30100_REG_INT_STATUS_FIFO_RDY BIT(7)

#define MAX30100_REG_INT_ENABLE 0x01
#define MAX30100_REG_INT_ENABLE_SPO2_EN BIT(0)
#define MAX30100_REG_INT_ENABLE_HR_EN BIT(1)
#define MAX30100_REG_INT_ENABLE_FIFO_EN BIT(3)
#define MAX30100_REG_INT_ENABLE_MASK 0xf0
#define MAX30100_REG_INT_ENABLE_MASK_SHIFT 4

#define MAX30100_REG_FIFO_WR_PTR 0x02
#define MAX30100_REG_FIFO_OVR_CTR 0x03
#define MAX30100_REG_FIFO_RD_PTR 0x04
#define MAX30100_REG_FIFO_DATA 0x05
#define MAX30100_REG_FIFO_DATA_ENTRY_COUNT 16
#define MAX30100_REG_FIFO_DATA_ENTRY_LEN 4

#define MAX30100_REG_MODE_CONFIG 0x06
#define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0)
#define MAX30100_REG_MODE_CONFIG_MODE_HR_EN BIT(1)
#define MAX30100_REG_MODE_CONFIG_MODE_MASK 0x03
#define MAX30100_REG_MODE_CONFIG_TEMP_EN BIT(3)