FT232RL：USB转串口芯片详解及新功能介绍

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FT232RL是由Future Technology Devices International Ltd.（FTDI）公司设计并生产的专为USB接口与串行UART通信转换而生的集成电路。这款设备在FTDI的USB UART接口系列中占据重要地位，其特点是集成了时钟发生器输出以及创新的FTDI Chip-ID™安全模块。 FT232R的核心功能是作为一个USB到串行通信桥接器，提供串行Universal Asynchronous Receiver/Transmitter (UART) 通信接口。与之前的型号相比，它新增了时钟生成器输出和FTDI Chip-ID™特性，这使得它在某些应用领域成为一个“三合一”解决方案。内置的6MHz、12MHz、24MHz和48MHz可调时钟信号可以外引，以便驱动微控制器或其他外部逻辑器件，提高了灵活性和扩展性。 FTDI Chip-ID™是嵌入在设备中的一个独特数字标识，它在生产过程中被固化，可以通过USB接口读取。这个功能被用作安全机制的基础，作为安全锁或身份验证工具，可以用来保护用户的定制应用程序免受未经授权的访问。用户可以根据该ID来确保他们的硬件和软件系统之间的兼容性和安全性。此外，FT232R还支持异步和同步位bang接口模式，这意味着它可以适应不同类型的通信协议和应用环境。它的设计特别之处在于将外部EEPROM、时钟电路和USB相关电阻集成在单个芯片上，简化了电路板设计，降低了系统成本和复杂度。 FT232RL是一款高度集成且功能强大的USB转串口转换器，其创新的安全特性使其在工业控制、物联网、嵌入式系统开发等领域具有广泛的应用潜力。通过提供稳定可靠的通信连接和灵活的接口选项，FT232R已成为许多设备和系统的基石，推动了USB技术在传统串口通信领域的广泛应用和发展。

FT232R USB UART I.C. Datasheet Version 1.04 © Future Technology Devices International Ltd. 2005

Page 6

Serial Interface Engine (SIE) - The Serial Interface Engine (SIE) block performs the Parallel to Serial and Serial to

Parallel conversion of the USB data. In accordance to the USB 2.0 speciﬁcation, it performs bit stufﬁng / un-stufﬁng

and CRC5 / CRC16 generation / checking on the USB data stream.

USB Protocol Engine - The USB Protocol Engine manages the data stream from the device USB control endpoint. It

handles the low level USB protocol (Chapter 9) requests generated by the USB host controller and the commands for

controlling the functional parameters of the UART.

FIFO TX Buffer (128 bytes) - Data from the USB data out endpoint is stored in the FIFO TX buffer and removed from

the buffer to the UART transmit register under control of the UART FIFO controller.

FIFO RX Buffer (256 bytes) - Data from the UART receive register is stored in the FIFO RX buffer prior to being

removed by the SIE on a USB request for data from the device data in endpoint.

UART FIFO Controller - The UART FIFO controller handles the transfer of data between the FIFO RX and TX buffers

and the UART transmit and receive registers.

UART Controller with Programmable Signal Inversion and High Drive - Together with the UART FIFO Controller

the UART Controller handles the transfer of data between the FIFO RX and FIFO TX buffers and the UART transmit

and receive registers. It performs asynchronous 7 / 8 bit Parallel to Serial and Serial to Parallel conversion of the

data on the RS232 (RS422 and RS485) interface. Control signals supported by UART mode include RTS, CTS,

DSR , DTR, DCD and RI. The UART Controller also provides a transmitter enable control signal pin option (TXDEN)

to assist with interfacing to RS485 transceivers. RTS / CTS, DSR / DTR and X-On / X-Off handshaking options are

also supported. Handshaking, where required, is handled in hardware to ensure fast response times. The UART also

supports the RS232 BREAK setting and detection conditions. A new feature, programmable in the internal EEPROM

allows the UART signals to each be individually inverted. Another new EEPROM programmable feature allows a high

signal drive strength to be enabled on the UART interface and CBUS pins.

Baud Rate Generator - The Baud Rate Generator provides a x16 clock input to the UART Controller from the 48MHz

reference clock and consists of a 14 bit prescaler and 3 register bits which provide ﬁne tuning of the baud rate

(used to divide by a number plus a fraction or “sub-integer”). This determines the Baud Rate of the UART, which is

programmable from 183 baud to 3 million baud.

The FT232R supports all standard baud rates and non-standard baud rates from 300 Baud up to 3 Megabaud.

Achievable non-standard baud rates are calculated as follows -

Baud Rate = 3000000 / (n + x)

where n can be any integer between 2 and 16,384 ( = 2

) and x can be a sub-integer of the value 0, 0.125, 0.25,

0.375, 0.5, 0.625, 0.75, or 0.875. When n = 1, x = 0, i.e. baud rate divisors with values between 1 and 2 are not

possible.

This gives achievable baud rates in the range 183.1 baud to 3,000,000 baud. When a non-standard baud rate is

required simply pass the required baud rate value to the driver as normal, and the FTDI driver will calculate the

required divisor, and set the baud rate. See FTDI application note AN232B-05 for more details.

RESET Generator - The integrated Reset Generator Cell provides a reliable power-on reset to the device internal

circuitry on power up. A RESET# input pin is provided to allow other devices to reset the FT232R. RESET# can be

tied to VCCIO or left unconnected, unless it is a requirement to reset the device from external logic or an external

reset generator I.C.

Internal EEPROM - The internal EEPROM in the FT232R can be used to store USB Vendor ID (VID), Product ID

(PID), device serial number, product description string, and various other USB conﬁguration descriptors. The internal

EEPROM is also used to conﬁgure the CBUS pin functions. The device is supplied with the internal EEPROM settings

preprogrammed as described in Section 10.

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