xviii Contents
4 Models for SoCs and Specifications ........................................ 55
4.1 IP Modelling Using Synchronous Kripke Structures ................. 57
4.1.1 Synchronous Kripke Structures ............................... 57
4.1.2 Composition of Synchronous Kripke Structures ............. 62
4.2 SoC Boilerplates........................................................ 64
4.2.1 Building a Meaningful Set of Boilerplates ................... 66
4.2.2 SoC Boiler-Plates.............................................. 71
4.3 Conclusions ............................................................. 71
5 SoC Design Methodology ................................................... 73
5.1 Protocol Mismatches ................................................... 74
5.2 Composition of Multi-clock IPs ....................................... 76
5.2.1 Clocks .......................................................... 77
5.2.2 Clock Automata ............................................... 77
5.2.3 SKS Oversampling ............................................ 78
5.3 Design Methodology Using Protocol Conversion .................... 81
5.4 Conclusions ............................................................. 85
6 Automatic Protocol Conversion ............................................ 87
6.1 Illustrative Example .................................................... 87
6.2 Modeling Data as Labels on States .................................... 90
6.2.1 Data Constraints ............................................... 91
6.2.2 Control Constraints ............................................ 94
6.3 Converters: Description and Control .................................. 94
6.3.1 I/O Relationship Between Converter,
Environment and On-Chip Protocols ......................... 95
6.3.2 Capabilities of the Converter.................................. 96
6.3.3 Types of Input/Output Signals of Converter.................. 97
6.3.4 Description of Converter ...................................... 99
6.3.5 Lock-Step Composition of Converter and
On-Chip Protocols............................................. 102
6.4 Generating Converters Using Module Checking...................... 105
6.5 Concluding Remarks ................................................... 106
7 Related Work and Outlook ................................................. 107
7.1 System-Level Verification.............................................. 107
7.2 Requirements ........................................................... 108
7.3 Models and Compositions ............................................. 109
7.3.1 Interface Modelling............................................ 109
7.3.2 Composition ................................................... 111
7.4 Analysis ................................................................. 112
7.4.1 Advanced Techniques ......................................... 114
7.5 The SoC Design Process ............................................... 115
7.5.1 System-Level Design .......................................... 115
7.5.2 Component-Based Design .................................... 116