低功耗高线性CMOS电流模式上变频混频器

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"A Low Power Highly Linear CMOS Current Mode Up-Conversion Mixer" 本文提出了一种低功耗、高线性的CMOS电流模式上变频混频器设计，特别适用于低功耗移动通信系统。传统上，混频器通常采用吉尔伯特结构，但该论文介绍的方法不同，它用电流镜替代了转换增益级，以实现足够的转换增益和高线性度。这一创新设计降低了功率损耗和供电电压，从而在保持性能的同时，优化了能源效率。电流模式上变频混频器的核心在于其电流镜结构。电流镜是一种能够复制输入电流并提供恒定输出电流的电路，它在这里起到了关键作用，提高了混频器的线性响应。此外，文中还采用了电流泄漏（current bleeding）技术，这是一种优化方法，通过引入小量的额外电流来改善混频器的性能，例如减少非线性失真和提高三阶输入截点（IIP3）。在0.18微米CMOS混合信号/射频工艺下，利用Cadence Spectre进行仿真，结果显示该混频器在1.2V的供电电压下，仅消耗3.8mW的功率，实现了24.5dBm的三阶输入截点（IIP3），5dB的转换增益以及14.9dB的单边带噪声系数。这些参数表明，该混频器在低功耗应用中具有出色的表现。电流泄漏技术是提高线性度的一种有效手段，它通过调整电路中的泄漏电流来平衡内部节点的电压波动，从而减少非线性效应。在本设计中，这种技术可能被用来进一步优化混频器的线性度和动态范围。 CMOS技术是集成电路设计中最常用的技术之一，因其低功耗、低成本和高性能的特点，常用于构建无线通信系统的前端部件，如混频器。电流模式设计则提供了更高的灵活性和更好的线性特性，特别是在低电压操作时。这篇论文提出的电流模式上变频混频器设计展示了如何通过创新的电路架构和优化技术在降低功耗的同时，保持和提升混频器的关键性能指标。这不仅对于无线通信系统的节能设计具有重要意义，也为未来的低功耗射频前端设计提供了新的思路和参考。

A Low Power Highly Linear

CMOS Current Mode

Up-Conversion Mixer

Chunhua Wang, Xiangyue Shi, Sichun Du, Qiuzhen Wan, Jingru Sun

Abstract – In order to decrease the power dissipation and supply voltage, a current mode up-conversion

mixer for RF transmitter is proposed in this paper. Different from the traditional Gilbert structure, the mixer

replaces the transconductance stage with current mirrors. This method can bring enough conversion gain

and high linearity. The way of current bleeding is also adopted here to improve the performance. The

simulation is made by Cadence Spectre in CHRT 0.18mm CMOS mixed signal/RF process. The simulation

results indicate that the mixer achieves 24.5dBm third-order input intercept point (IIP3), 5dB conversion gain

and 14.9dB SSB noise figure while its power dissipation is only 3.8mW under 1.2 V supply voltage. It is

especially suitable for low power mobile communication.

Index Terms – CMOS, up-conversion mixer, current mode, current bleeding, Volterra series

1 Introduction

With the development of the mobile communication, the

demand for low-cost, small-size and low-power equipment

increases rapidly. In order to meet the need, the CMOS single-

chip communication system is proposed, which contains both

the RFand digital modules[1]. However, this causes some new

problems such as different supply voltages of the RF and

digital circuits, thermal dissipation and intrinsic defects of the

CMOS devices. More and more researchers begin to study on

these issues.

Mixer is a very important part of the wireless communica-

tion system[2]. It performs frequency down- conversion in a

receiver and frequency up-conversion in a transmitter. The

design of mixer should make a trade-off among the linearity,

conversion gain, noise figure and power dissipation. In low

power field, the power dissipation and linearity are very

important, because they respectively decide the life of the

battery and the mixers immunity to the interference.

Usually the mixer is based on the Gilbert structure which

requests a stack of three transistors. Although the Gilbert

mixer has the advantages of good port-to-port isolation and

high conversion gain, its high supply voltage and power

dissipation prevent its application in low power field. To

improve the performance of the Gilbert mixer, several

improved structures have been proposed: a folded switching

mixer using current reuse[3], it can reduce the power

dissipation and supply voltage, but the linearity will deterio-

rate because of more transistors; a modified mixer with the

source degeneration inductors[4], this method can improve

the linearity of the mixer, but the conversion gain may

decrease as well.

Different from the voltage mode circuit, the current mode

circuit has both low impedance and low voltage at internal

nodes. So it usually has higher linearity and lower power

dissipation[5]. And now it attracts more and more attention in

low power field. A novel CMOS current mode down-

conversion mixer was proposed in 2002[6]. It has a high

linearity and low power dissipation at 900MHz work fre-

quency, but the conversion gain is less than zero. Recently a

CMOS current mode up-conversion mixer has been present-

ed[5]. It has high conversion gain and low power dissipation,

but the structure is too complex.

A low power highly linear CMOS current mode up-

conversion mixer is proposed in this paper. Both current

mirrors and the method of current bleeding are adopted here,

and the structure of the mixer is simple. The simulation is

made by Cadence Spectre in CHRT 0.18mm CMOS mixed

signal/RF process. Compared with the previous CMOS

voltage-mode mixers[7 –9] and current-mode mixers[5,6,10]

at the similar frequency, the mixer simultaneously has lower

power dissipation of 3.8mW and much higher linearity of

24.5dbm under the 1.2 V supply voltage.

2 Circuit analysis

The circuit is shown in Fig.1, which is based on Gilbert double-

balance mixer. The transistors M1, M2, M3 and M4 comprise

the input current mirrors. By this way, the mixer can directly

accept the current waveform input signal without extra V-I

conversion stage. It can also have high conversion gain with

the help of the current mirrors amplification. The inductor

L1, L2 can improve the linearity of the current mirrors. The

reason is given by Volterra-series in part B of this section. The

transistors M5, M6, M7, and M8 work as switches. Meanwhile

the current sources I1, I2 can improve the performance of the

switch transistors by adjusting the bias current. By the two

optimizing methods of adding inductors and current sources,

the total IIP3 of the mixer is as high as 24.5dbm. The LC tanks

C1 L3 C2 and L4 are helpful for increasing the conversion

gain.

2.1 Up-conversion principle

The transistors M5-M8 are driven by LO signals, and they

switch on and off by turns. If the LO signal is large enough,

transistors M5-M8 can be approximated to be ideal switches.

Fig.1. the schematic of the proposed mixer

Frequenz

64 (2010)

11– 12

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