数字通信接收机：同步、信道估计与信号处理

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"Digital Communication Receivers Synchronization, channel estimation and signal processing" 数字通信接收机的同步、信道估计和信号处理是通信系统中的关键环节。本书《Digital Communication Receivers: Synchronization, Channel Estimation, and Signal Processing》由Heinrich Meyr、Marc Moeneclaey和Stefan A. Fechtel合著，详细探讨了这些核心概念。在数字通信中，接收机的同步至关重要。同步主要包括载波同步、位同步和帧同步。载波同步是指接收机的本地载波频率与发射机的载波频率保持一致，以消除频率偏移对信号解调的影响。位同步确保数据比特的正确捕获和定时恢复，避免由于码间干扰（ISI）导致的误码率上升。而帧同步则是指接收机能够准确识别数据包的起始和结束，这对于多载波系统或分组数据传输尤其重要。信道估计是克服无线通信环境中多径传播、衰落和噪声影响的关键步骤。它涉及对信道状态信息（CSI）的获取，以补偿信道的影响，提高信号质量。信道估计通常通过训练序列或者导频符号进行，这些符号在已知时间和频率位置发送，用于估计信道的频率响应。信号处理部分涵盖了从信号检测、滤波到解调等一系列操作。信号检测是判断接收到的信号是否存在以及其携带的信息的过程。滤波器设计用于去除噪声和改善信号质量，包括匹配滤波器和均衡器等。解调是将调制的信号转换回原始数据比特流的过程，这需要考虑不同调制方式（如ASK、FSK、QAM）的特点。此外，书中可能还讨论了现代通信技术如OFDM（正交频分复用）、MIMO（多输入多输出）和软件定义无线电（SDR）中的同步和信号处理挑战。这些技术在提升通信容量和抗干扰能力方面发挥着重要作用。该书深入剖析了数字通信接收机的核心技术，对理解现代通信系统的设计和优化具有重要价值。对于从事通信工程、信号处理和相关领域的研究人员和工程师来说，是一本不可或缺的参考书。

CONTENTS

152.2 Maximum-Likelihood DA Snapshot

Acquisition

15.2.3 Example: DA Receiver for Uncoded

M-PSK

15.2.4 Example: DA Receiver for Trellis-

Coded Modulation

152.5 Main Points

15.3 Bibliographical Notes

Bibliography

xvii

787

793

804

a12

a14

819

Preface

This book is about receivers for digital communications. The word digital carries a

double meaning. It refers to the fact that information is transported in digital form.

It also refers to the property of the receiver to retrieve the transmitted information,

apart from the analog front end, entirely by means of digital signal processing.

The ever-increasing demand for mobile and portable communication ultimately

calls for optimally utilizing the available bandwidth. This goal is only attainable by

digital communication systems capable of operating close to the information theo-

retic limits. The implementation of such systems has been made possible by the

enormous progress in semiconductor technology which allows the communication

engineer to economically implement “systems on silicon” which execute:

1. Advanced compression algorithms to drastically reduce the bit rate required to

represent a voice or video signal with high quality.

2. Sophisticated algorithms in the receiver for power control, channel estimation,

synchronization, equalization, and decoding.

3. Complex protocols to manage traffic in networks.

4. User-friendly graphical man-machine interfaces.

Seen from a different perspective we argue that the communication engineer to-

day can trade the familiar physical performance measures bandwidth and power

eficiency for signal processing complexity. As a consequence, the design process

is characterized by a close interaction of architecture and algorithm design, as

opposed to a separation between theory and implementation in the traditional

way.

This book differs substantially from other texts in communication engineering in

the selection and treatment of topics. We focus on channel estimation, synchroniza-

tion, and digital signal processing. In most books on digital communications, syn-

chronization and channel estimation are addressed only superficially, if at all. This

must give the reader the impression that these tasks are trivial and that the error per-

formance is always close to the limiting case of perfect channel knowledge and syn-

chronization. However, this is a most unfortunate misconception for the following

reasons:

1. Error performance: Synchronization and channel estimation are critical to error

performance;

2. Design effort: A large amount of design time is spent in solving these problems;

xix

PREFACE

3. Implementation: A very large portion of

the receiver

dedicated to synchronization and channel

estimation.

hardware

and software

In our endeavour to write this book we have set the following goals. First, we

have made an effort to systematically structure the information on these topics to

make it accessible to the communication engineer, and second, we hope to convince

the reader that channel estimation and synchronization algorithms can be developed

very elegantly using mathematical estimation theory. By this we hope to supply the

reader not only with a collection of results but to provide an elegant mathematical

tool to solve design problems.

The book falls naturally into four major parts. Following the introduction (Part

A), Part B is devoted to mathematical background material. Part C is concerned

with baseband communication. Part D deals with passband communication over

time variant channels. Part E addresses transmission over fading channels. The

structuring of the material according to types of channels is motivated by the fact

that the receiver is always designed for a given channel. For example, the engineer

designing a clock recovery circuit for a fiber-optical channel receiver does not need

to worry about channel estimation algorithms for fading channels.

BASIC MATERIAL

The purpose of this part of the book is to provide a concise treatment of those topics

in random process theory, signal analysis, and estimation theory that are used later

on in the book. It is not intended as a replacement for formal courses in these topics

but might serve to fill in a limited number of gaps in the reader’s knowledge. For the

mathematically versed reader it serves as a quick summary of results and introduc-

tion to the notation used.

BASEBAND COMMUNICATION

There are four sections in this part. Section 2.1 provides an introduction to baseband

communication with emphasis on high data rate applications. We discuss the practi-

cally important topic of line coding which is often ignored in more theoretically in-

clined books on communication theory. Section 2.2 provides a classification of

clock recovery circuits and the disturbances which impair the performance of such

circuits. The next two sections (2.3 and 2.4) are devoted to an in-depth treatment of

the two main classes of clock recovery circuits. We discuss the differences and com-

monalities of error feedback synchronizers (Section 2.3) and spectral line generat-

ing synchronizers (Section 2.4). We also study the effect of jitter accumulation in a

chain of repeaters. In section 2.5 we analyze in detail the performance of three prac-

tically important synchronizers. The influence of different disturbances such as self-

noise and additive noise are discussed. Self-noise reducing techniques, which are

crucial when clock recovery circuits are cascaded, are described.

PREFACE

xxi

PASSBAND COMMUNICATION OVER TIME INVARIANT CHANNELS

Chapter 3 briefly reviews the fundamentals of passband transmission over a time in-

variant channel. In Chapter 4 the optimum maximum-likelihood receiver is rigor-

ously derived. We differ from the usual treatment of the subject by deriving a fully

digital receiver structure, comprising digital matched filter, interpolator, variable

rate decimator, and carrier phase rotator. While the optimal receiver is clearly non-

realizable, it forms the basis for suitable approximations leading to practical receiv-

er structures, the key issue being the principle of synchronized detection. In Chapter

5 estimation theory is used to systematically derive algorithms for timing and carri-

er phase synchronization. Chapter 6 is concerned with performance analysis of syn-

chronizers. We derive lower bounds on the variance of synchronization parameter

estimates. These bounds serve as a benchmark for practical synchronizers. The

tracking performance of carrier and symbol synchronizers is analyzed in Section

6.3. Nonlinear phenomena, such as acquisition and cycle slips, are discussed in

Section 6.4. Chapter 7 derives the bit error rate performance degradation as func-

tion of the carrier phase and timing error variance for practically important modula-

tion formats. Chapter 8 is concerned with the derivation of digital algorithms for

frequency estimation and the performance analysis of these algorithms. Chapter 9

discusses timing recovery by interpolation and controlled decimation. Chapter 10 is

devoted to implementation. We address the design methodology and CAD tools. A

recently completed DVB (Digital Video Broadcasting) ASIC chip design serves as

a case study to illustrate the close interaction between algorithm and architecture

design.

COMMUNICATION OVER FADING CHANNELS

Chapter 11 gives an introduction to fading channels. Starting with time-continuous

and discrete-equivalent flat and selective fading channel models, the statistical char-

acterization of fading channels as well as techniques of modeling and simulation of

discrete-equivalent fading channels are discussed. Chapter 12 is concerned with the

fundamentals of detection and parameter synchronization on fading channels.

Based on mathematical transmission models, optimal estimation-detection receiver

structures for joint detection and synchronization are derived. Chapter 13 presents

realizable receiver structures for synchronized detection on flat and selective fading

channels. The concept of outer and inner receivers is reviewed, with emphasis on the

role of diversity. Inner receiver structures, particularly suited for serial or TDMA-

like channel access, are discussed for both flat and selective fading channels, detail-

ing on decision metric computation and preprocessing of the received signal. A

brief extension to CDMA systems concludes the chapter. Parameter synchroniza-

tion for flat fading channels is the topic of Chapter 14. Algorithms for non-data-aid-

ed (NDA), decision-directed (DD), and data-aided (DA) flat fading channel estima-

tion and their performance are discussed in detail. In Chapter 15 adaptive

algorithms for NDA/DD selective fading channel estimation, as well as methods of

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