ADS8509I：16位高精度SAR A/D转换器手册

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标题："ADS8509I芯片手册"是一份详细的文档，介绍了一款高性能的16位250千赫兹模拟到数字转换器（ADC）——ADS8509。该芯片由TI公司制造，采用先进的CMOS技术，提供了多种输入电压范围的选择，包括4V、5V、10V、±3.33V、±5V和±10V，以适应广泛的信号处理应用。核心特性包括： 1. 连续模数转换器 (SAR): ADS8509配备了一个完整的16位、基于电容的SAR A/D转换器，具备样本保持功能，确保了高精度的数据转换，最大输入线性误差（INL）仅为±2LSB，最大失调量（DNL）小于±1LSB，且不会出现丢失代码现象。 2. 时钟选项：数据可以使用内部时钟进行采样，同时也支持外部时钟同步，通过SPI兼容的串行输出接口实现数据传输，支持菊花链连接，便于与标准数字信号处理器（DSP）集成，提升了系统的灵活性和易用性。 3. 参考电压源：内置的参考电压源（+2.5VRef），为A/D转换提供稳定的基准，确保了转换过程中的准确性。 4. 接口电路：包括缓冲器、比较器、锁存控制信号（CS）、数据/控制总线（包括BUSY、DATACLK、DATA等），以及扩展/中断输入（EXT/INT）、参考/复位（R/C）等，这些都支持高效的数据交互和系统控制。 5. 电源管理：单个5V电源供电设计，简化了电源管理，并降低了功耗。 6. 封装和版本信息：文档最后注明了SLAS324C，日期为2004年10月修订至2010年4月，展示了该芯片的最新状态。整体来说，ADS8509I是一款针对需要高速、高精度和易于集成应用的工业级ADC解决方案，特别适合于对数据采集有严格要求的系统，如音频处理、工业测量或信号分析等领域。通过深入理解和利用其特性，工程师可以充分发挥这款芯片在数字化信号处理中的优势。

ADS8509

SLAS324C –OCTOBER 2004–REVISED APRIL 2010

www.ti.com

Terminal Functions

TERMINAL

DESCRIPTION

NAME DB NO. DW NO. I/O

AGND1 2 2 – Analog ground. Used internally as ground reference point. Minimal current flow.

AGND2 9 7 – Analog ground

BUSY 25 17 O Busy output. Falls when a conversion is started and remains low until the conversion is completed

and the data is latched into the output shift register.

CAP 6 5 – Reference buffer capacitor. 2.2-mF Tantalum to ground.

CS 24 16 – Chip select. Internally ORed with R/C.

DATA 17 13 O Serial data output. Data is synchronized to DATACLK with the format determined by the level of

SB/BTC. In the external clock mode, after 16 bits of data, the ADS8509 outputs the level input on

TAG as long as CS is low and R/C is high (see Figure 8 and Figure 9). If EXT/INT is low, data is

valid on both the rising and falling edges of DATACLK, and between conversions DATA stays at

the level of the TAG input when the conversion was started.

DATACLK 16 12 I/O Either an input or an output depending on the EXT/INT level. Output data is synchronized to this

clock. If EXT/INT is low, DATACLK transmits 16 pulses after each conversion and then remains

low between conversions.

DGND 14 10 – Digital ground

EXT/INT 13 9 – Selects external or internal clock for transmitting data. If high, data is output synchronized to the

clock input on DATACLK. If low, a convert command initiates the transmission of the data from the

previous conversion, along with 16-clock pulses output on DATACLK.

NC 5, 8, 10, – – No connect

11, 18,

20, 22,

PWRD 26 18 I Power down input. If high, conversions are inhibited and power consumption is significantly

reduced. Results from the previous conversion are maintained in the output shift register.

R/C 21 15 I Read/convert input. With CS low, a falling edge on R/C puts the internal sample-and-hold into the

hold state and starts a conversion. When EXT/INT is low, this also initiates the transmission of the

data results from the previous conversion. If EXT/INT is high, a rising edge on R/C with CS low or

a falling edge on CS with R/C high transmits a pulse on SYNC and initiates the transmission of

data from the previous conversion.

REF 7 6 I/O Reference input/output. Outputs internal 2.5-V reference. Can also be driven by external system

reference. In both cases, bypass to ground with a 2.2-mF tantalum capacitor.

1 1 I Analog input. See Table 2 for input range connections.

3 3 I Analog input. See Table 2 for input range connections.

4 4 I Analog input. See Table 2 for input range connections.

SB/BTC 12 8 I Select straight binary or binary 2's complement data output format. If high, data is output in a

straight binary format. If low, data is output in a binary 2's complement format.

SYNC 15 11 O Sync output. This pin is used to supply a data synchronization pulse when the EXT level is high

and at least one external clock pulse has occurred when not in the read mode. See the external

clock modes desciptions.

TAG 19 14 I Tag input for use in the external clock mode. If EXT is high, digital data input from TAG is output

on DATA with a delay that is dependent on the external clock mode. See Figure 8 and Figure 9.

ANA

27 19 I Analog supply input. Nominally +5 V. Connect directly to pin 20 and decouple to ground with

0.1-mF ceramic and 10-mF tantalum capacitors.

DIG

28 20 I Digital supply input. Nominally +5 V. Connect directly to pin 19. Must be ≤ V

ANA

Product Folder Link(s): ADS8509

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