
visual information from multiple disparate view-
points, help overcoming occlusion effects, and thus
enable enhanced interaction with the environment.
4.1.1. Low-resolution imaging motes
The recent availability of CMOS imaging sensors
[61] that capture and process an optical image within
a single integrated chip, thus eliminating the need for
many separate chips required by the traditional
charged-coupled device (CCD ) technology, has
enabled the massive deployment of low-cost visual
sensors. CMOS image sensors are already in many
industrial and consumer sectors, such as cell phones,
personal digital assistants (PDAs), consumer and
industrial digital cameras. CMOS image quality is
now matching CCD quality in the low- and mid-
range, while CCD is still the technology of choice
for high-end image sensors. The CMOS technology
allows integrating a lens, an image sensor and image
processing algorithms, including image stabilization
and image compression, on the same chip. With
respect to CCD, cameras are smaller, lighter, and
consume less power. Hence, they constitute a suit-
able technology to realize imaging sensors to be
interfaced with wireless motes.
However, existing CMOS imagers are still
designed to be interfaced with computationally rich
host devices, such as cell phones or PDAs. For this
reason, the objective of the Cyclops module [103] is
to fill the gap between CMOS cameras and compu-
tationally constrained devices. Cyclops is an elec-
tronic interface between a CMOS camera module
and a wireless mote such as MICA2 or MICAz,
and contains programmable logic and memory for
high-speed data communication. Cyclops consists
of an imager (CMOS Agilent ADCM-1700 CIF
camera), an 8-bit ATMEL ATmeg a128L microcon-
troller (MCU), a complex programmable logic
device (CPLD), an external SRAM and an external
Flash. The MCU controls the imager, configures its
parameters, and performs local processing on the
image to produce an inference. Since image capture
requires faster data transfer and address generation
than the 4 MHz MCU used, a CPLD is used to pro-
vide access to the high-speed clock. Cyclops firm-
ware is written in the nesC language [48], based on
the TinyOS libraries. The module is connected to
a host mote to which it provides a high level inter-
face that hides the complexity of the imaging device
to the host mote. Moreover, it can perform simple
inference on the image data and present it to the
host.
Researchers at Carnegie Mellon University are
developing the CMUcam 3, which is an embedded
camera endowed with a CIF Resolution (352 · 288)
RGB color sensor that can load images into memory
at 26 frames per second. CMUcam 3 has software
JPEG compression and has a basic image manipula-
tion library, and can be interface with an 802.15.4
compliant TelosB mote [6].
In [41], the design of an integrated mote for wire-
less image sensor networks is described. The design
is driven by the need to endow motes with adequate
processing power and memory size for image sens-
ing applications. It is argued that 32-bit processors
are better suited for image processing than their 8-
bit counterpart, which is used in most existing
motes. It is shown that the time needed to perform
operations such as 2-D convolution on an 8-bit pro-
cessor such as the ATMEL ATmega128 clocked at
4 MHz is 16 times higher than with a 32-bit
ARM7 device clocked at 48 MHz, while the power
consumption of the 32-bit processor is only six times
higher. Hence, an 8-bit processor turns out to be
slower and more energy-consuming. Based on these
premises, a new image mote is developed based on
an ARM7 32-bit CPU clocked at 48 MHz, with
external FRAM or Flash memory, 802.15.4 compli-
ant Chipcon CC2420 radio, that is interfaced with
mid-resolution ADCM-1670 CIF CMOS sensors
and low-resolution 30 · 30 pixel optical sensors.
The same conclusion is drawn in [81], where the
energy consumption of the 8-bit Atmel AVR pro-
cessor clocked at 8 MHz is compared to that of
the PXA255 32-bit Intel processor, embedded on a
Stargate platform [10] and clocked at 400 MHz.
Three representative algorithms are selected as
benchmarks, i.e., the cyclic redundancy check, a
finite impulse response filter, and a fast Fourier
transform. Surprisingly, it is shown that even for
such relatively simple algorithms the energy con-
sumption of an 8-bit processor is between one and
two orders of magnitude higher.
4.1.2. Medium-resolution imaging motes based on the
Stargate platform
Intel has developed several prototypes that con-
stitute important building platform for WMSN
applications. The Stargate board [10] is a high-per-
formance processing platform designed for sensor,
signal processing, control, robotics, and sensor net-
work applications. It is designed by Intel and pro-
duced by Crossbow. Stargate is based on Intel’s
PXA-255 XScale 400 MHz RISC processor, which
928 I.F. Akyildiz et al. / Computer Networks 51 (2007) 921–960