FPGA实现的空间矢量PWM控制器设计与验证

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本文主要探讨了基于FPGA的空间矢量脉宽调制（SVPWM）的实现技术，该方法由Zhaoyong Zhou和Tiecai Li在哈尔滨工业大学电子工程系提出，并与国际 Rectifier 的 Toshio Takahashi 和 Eddy Ho 合作完成。论文首先回顾了空间矢量调制的基本原理，它在上世纪80年代中期由Van Der Broeck首次引入，因其在现代高性能交流伺服驱动系统中的广泛应用而备受关注。 SVPWM的核心在于通过精确控制脉冲宽度来模拟多相电压波形，从而实现高效的电流和功率控制。设计的关键在于FPGA的集成，这种可编程逻辑器件的优势在于其灵活性、高速处理能力和高度定制化的可能性。作者设计了一种通用的SVPWM控制器，不仅限于线性范围内的工作，还包括过调制范围，以增强系统的性能和适应性。该FPGA实现的SVPWM控制器经过实际验证，展现了卓越的驱动性能和灵活的开关频率，可以调整至高达40kHz，这在电机控制中非常重要。此外，控制器还允许调整死区时间，进一步优化了系统的稳定性。SVPWM集成电路的应用领域广泛，特别是在闭环矢量控制的交流伺服驱动系统中，它能够提供高精度的控制和效率。关键词包括：空间矢量脉宽调制（SVPWM）、FPGA、过调制。这项研究为高性能交流伺服驱动系统的控制器设计提供了创新的解决方案，展示了FPGA在实现复杂算法和技术上的潜力，对于推动电机控制技术的发展具有重要意义。

Design of a Universal Space Vector PWM Controller

Based on FPGA

Zhaoyong Zhou and Tiecai Li

Department of Electrical Engineering

Harbin Institute of Technology

Harbin, China

E-mail: zhouzy@hit.edu.cn

Toshio Takahashi and Eddy Ho

Digital Control IC Design Center

International Rectifier

California, USA

E-mail: ttakaha1@irf.com

Abstract—This paper presents a new design scheme of space

vector PWM integrated circuit, including linear and

overmodulation ranges. The proposed scheme is implemented

and verified on a single Xilinx FPGA. Experimental results show

that this controller can present an excellent drive performance

and its switching frequency, which can be set to 40kHz, is

adjustable as well as its dead time. The SVPWM IC has been

used in closed vector control of AC servo drive system.

Keywords-SVPWM; FPGA; overmodulation

I. INTRODUCTION

Space vector pulse-width modulation (SVPWM), which

was first advanced by Van Der Broeck in the middle 1980s [1],

is one of the most popular technology in modern high

performance AC servo drive systems. Up to now, its theories

and algorithms have been well developed and applied more and

more widely with the progress of power electronics. Compared

with sinusoidal PWM, which is another useful modulation

strategy, the linear range of the SVPWM is 15% higher than

the SPWM; furthermore, the SVPWM can continuously

change from linear to overmodulation and six-step mode with a

superior utility factor of the DC bus voltage [2]-[4].

In most engineering practice, the SVPWM algorithm is

mainly implemented with software based on DSP or MCU [5].

This method is very flexible and can realize complex

algorithms, but it has some disadvantages, such as long

development period, poor reuse of codes and more CPU

resources. Once the control algorithms are very sophisticated or

changes must to be made, some unwanted problems can

appear. Thus, the purely software-based technique is not an

ideal solution. In practice, what we need is high performance,

low cost and inheritability. Fortunately, a new design

methodology that can satisfy our demands has arisen in recent

years; that is FPGA-based hardware implementation

technology [6]. Because of the programmable characteristic of

FPGA and IP cores, users can design their own ASIC in lab

according to their schemes, instead of participation of the

semiconductor manufacturer. In addition, since FPGA can

carry out parallel processing by means of hardware mode,

which occupies nothing of the CPU, the system can get a very

high speed level as well as an exciting precision. This novel

design methodology has now been used in high performance

motion control field, such as [7] and [8]. Literature [7]

proposed a universal SVPWM controller with overmodulation

and dead time compensation, but it is not a flexible design and

its switching frequency can not be set arbitrarily; besides, the

design needs an extra EPROM to storage sine and cosine

values as a lookup table, so its resolution is not high. In [8], the

constructed IC has a strong function but unfortunately it does

not include overmodulaton range and also needs additional

EPROM.

In this paper, a different design idea is provided to realize

the registered universal SVPWM algorithm, which is designed

in International Rectifier iMOTION products such as the

IRMCK201/IRMCK202 digital control ICs, and being applied

to the real industry application. The proposed algorithm

incorporates the overmodulation range and separates the sine

generator to implement by an independent CORDIC module

instead of a lookup table [9]. In detail, this paper is organized

as follows. In section II, SVPWM principle is briefly reviewed

and the relevant expressions are derived. Section III describes

the hardware design scheme. Section IV implements the

circuits on a low cost FPGA and shows the experimental

results. In section V some conclusions are drawn.

II. P

RINCIPLE OF THE SVPWM

Fig.1 illustrates the traditional circuitry structure of the

three-phase PWM inverter and AC motor windings, where u

and u

are the three-phase instantaneous voltages with

respect to the neutral point N, and u

, u

and u

are the

three-phase instantaneous voltages with respect to the ground,

and u

is the neutral point voltage with respect to the ground.

is the voltage of the DC bus. Thus,

(1)

The voltage space vector of the motor windings can be

defined as follows:

(2)

where .











NOWNWO

NOVNVO

NOUNUO

uuu

()

VNUN

uaauuU ++=

ππ

eaea ==

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