TI LMH1297：集成SDI时钟恢复器与电缆均衡/驱动器技术详解

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TI-LMH1297是一款高性能的集成电路，专为高速串行数字接口（SDI）应用设计，如高清（HD）、标准定义电视（SD）和专业音频/视频信号传输。该器件集成了一个可配置的电缆均衡器或电缆驱动器，以及一个内置的时钟恢复器，以确保数据在长距离传输过程中保持稳定和无误。这款产品的主要特性包括： 1. **用户可配置性**：LMH1297允许用户根据具体需求选择作为电缆均衡器或驱动器使用，提供灵活性以适应不同的系统配置。 2. **兼容多种标准**：它兼容多种串行接口标准，如ST-2082-1 (12G)、ST-2081-1 (6G)、ST-424 (3G)、ST-292 (HD)和ST-259 (SD)，以及DVB-ASI和AES10 (MADI)，广泛适用于不同行业和应用领域。 3. **集成时钟恢复功能**：集成的时钟恢复器可以锁定在11.88 Gbps、5.94 Gbps等多速率，包括1.485 Gbps和1.001分频子速率，以及270 Mbps的SMPTE速率，确保数据传输的精确同步。 4. **75 Ω终端和回损补偿**：器件内部包含75 Ω终端和回损补偿网络，有助于改善信号质量，减少反射和衰减，从而提高信号完整性。 5. **两种工作模式**：EQ模式下，LMH1297作为自适应电缆均衡器工作，通过去加重功能优化信号的幅度和相位平衡；而在驱动器模式下，它可以驱动SDI接口，确保信号能够有效地传输到接收端。 6. **版权与支持**：文档提供的是中文版本的方便性信息，但建议用户在进行实际设计前查阅最新的英文版数据手册SNLS545，因为官方信息始终优先，并且可能存在更新或更准确的内容。TI公司不保证翻译的一致性和有效性，强烈建议参考原文。 LMH1297是针对高速串行数据传输需求设计的，具有高度的灵活性和性能优势，适用于对信号完整性要求高的各种专业应用环境。

LMH1297

ZHCSK26C –MARCH 2017–REVISED JULY 2019

www.ti.com.cn

Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(1) This parameter is measured with the LMH1297EVM (Evaluation board for LMH1297).

4-LEVEL LOGIC DC SPECIFICATIONS (APPLY TO ALL 4-LEVEL INPUT CONTROL PINS)

LVL_H

LEVEL-H input voltage

Measured voltage at 4-level pin with

external 1 kΩ to VIN

VIN V

LVL_F

LEVEL-F default voltage Measured voltage 4-level pin at default

2/3 ×

VIN

LVL_R

LEVEL-R input voltage

Measured voltage at 4-level pin with

external 20 kΩ to VSS

1/3 ×

VIN

LVL_L

LEVEL-L input voltage

Measured voltage at 4-level pin with

external 1 kΩ to VSS

0 V

Input high leakage current

(Vinput = VIN)

4-levels (HOST_EQ0, MODE_SEL,

OUT_CTRL, SDI_VOD)

20 45 80 µA

SMBus mode: 4-levels (ADDR0, ADDR1) 20 45 80 µA

Input low leakage current

(Vinput = GND)

4-levels (HOST_EQ0, MODE_SEL,

OUT_CTRL, SDI_VOD)

–160 –93 –40 µA

SMBus mode: 4-levels (ADDR0, ADDR1) –160 –93 –40 µA

RECEIVER SPECIFICATIONS (SDI_IO+, EQ MODE)

SDI_IO_TERM

DC input single-ended

termination

SDI_IO+ and SDI_IO– to internal common

mode bias

63 75 87 Ω

SDI_IO_S11

Input return loss at SDI_IO+

reference to 75 Ω

(1)

S11, 5 MHz to 1.485 GHz –30 dB

S11, 1.485 GHz to 3 GHz –22 dB

S11, 3 GHz to 6 GHz –12 dB

S11, 6 GHz to 12 GHz –8 dB

SDI_IO_CM

SDI_IO+ DC common-mode

voltage

Input DC common-mode voltage at

SDI_IO+ or SDI_IO- to GND

1.4 V

SDI_IO_WANDER

Input DC wander

SD, input signal at SDI_IO+,

Input launch amplitude = 800 mVp-p

100 mVp-p

HD, 3G, 6G, 12G, input signal at SDI_IO+,

Input launch amplitude = 800 mVp-p

50 mVp-p

RECEIVER SPECIFICATIONS (IN0±, CD MODE)

IN0_TERM

DC input differential termination Measured across IN0+ to IN0– 80 100 120 Ω

IN0_SDD11

Input differential return loss

(1)

SDD11, 10 MHz – 2.8 GHz –22 dB

SDD11, 2.8 GHz – 6 GHz –16 dB

SDD11, 6 GHz – 11.1 GHz –10 dB

IN0_SCD11

Differential to common-mode

input conversion

(1)

SCD11, 10 MHz to 11.1 GHz –21 dB

IN0_CM

DC common-mode voltage

Input common-mode voltage at IN0+ or

IN0– to GND

2.06 V

ON_IN0

Signal detect (default)

Assert ON threshold level for

IN0±

11.88 Gbps, EQ and PLL pathological

pattern

20 mVp-p

OFF_IN0

Signal detect (default)

Deassert OFF threshold level

for IN0±

11.88 Gbps, EQ and PLL pathological

pattern

18 mVp-p

LMH1297

www.ti.com.cn

ZHCSK26C –MARCH 2017–REVISED JULY 2019

Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(2) V

OVERSHOOT

overshoot/undershoot maximum measurements are largely affected by the PCB layout and input test pattern. The

maximum value specified in Electrical Characteristics for V

OVERSHOOT

is based on bench evaluation across temperature and supply

voltages with the LMH1297EVM.

DRIVER OUTPUT (SDI_IO+ AND SDI_OUT+, CD MODE)

OUT_TERM

DC output single-ended

termination

SDI_IO+ and SDI_IO–,

SDI_OUT+ and SDI_OUT– to VIN

63 75 87 Ω

VOD

CD_OUTP

Output single-ended output

voltage

Measure AC signal at SDI_IO+ and

SDI_OUT+, with SDI_IO– and SDI_OUT–

AC terminated with 75 Ω

SDI_VOD = H

840 mVp-p

SDI_VOD = F 720 800 880 mVp-p

SDI_VOD = R 880 mVp-p

SDI_VOD = L 760 mVp-p

VOD

CD_OUTN

Output single-ended output

voltage

Measure AC signal at SDI_IO– and

SDI_OUT-, with SDI_IO+ and SDI_OUT+

AC terminated with 75 Ω

SDI_VOD = H

840 mVp-p

SDI_VOD = F 720 800 880 mVp-p

SDI_VOD = R 880 mVp-p

SDI_VOD = L 760 mVp-p

PRE

CD_OUTP

Output pre-emphasis

Output pre-emphasis boost amplitude at

SDI_IO+ and SDI_OUT+, programmed to

maximum setting through register,

measured at SDI_VOD=F

2 dB

PRE

CD_OUTN

Output pre-emphasis

Output pre-emphasis boost amplitude at

SDI_IO– and SDI_OUT–, programmed to

maximum setting through register,

measured at SDI_VOD=F

2 dB

R_F_SDI

Output rise and fall time

(1)

Measured with PRBS10 pattern, default

VOD at 20% – 80% amplitude, default pre-

emphasis enabled

11.88 Gbps

34 42 ps

5.94 Gbps 36 43 ps

2.97 Gbps 59 67 ps

1.485 Gbps 60 73 ps

270 Mbps 400 550 700 ps

R_F_DELTA

Output rise and fall time

mismatch

(1)

Measured with PRBS10 pattern, default

VOD at 20% – 80% amplitude, default pre-

emphasis enabled

11.88 Gbps

3 18 ps

5.94 Gbps 2.7 12 ps

2.97 Gbps 0.8 11 ps

1.485 Gbps 0.8 12 ps

270 Mbps 72 150 ps

OVERSHOOT

Output overshoot or

undershoot

(1)

Measured with PRBS10 pattern, default

VOD, default pre-emphasis enabled

(2)

12G/6G/3G/HD/SD

DC_OFFSET

DC offset 12G/6G/3G/HD/SD ±0.2 V

DC_WANDER

DC wander

12G/6G/3G/HD/SD with EQ pathological

pattern

20 mV

LMH1297

ZHCSK26C –MARCH 2017–REVISED JULY 2019

www.ti.com.cn

Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(3) This limit is ensured by bench characterization and is not production tested.

CD_S22

Output return loss at SDI_IO+

and SDI_OUT+ reference to 75

(1)

S22, 5 MHz to 1.485 GHz –25 dB

S22, 1.485 GHz to 3 GHz –22 dB

S22, 3 GHz to 6 GHz –12 dB

S22, 6 GHz to 12 GHz –8 dB

DRIVER OUTPUT (OUT0±, EQ AND CD MODE)

OUT0_TERM

DC output differential

termination

Measured across OUT0+ and OUT0– 80 100 120 Ω

VOD

OUT0

Output differential voltage at

OUT0±

Measured with 8T pattern

HOST_EQ0 = H

410 mVp-p

HOST_EQ0 = F 485 560 620 mVp-p

HOST_EQ0 = R 635 mVp-p

HOST_EQ0 = L 810 mVp-p

VOD

OUT0_DE

De-emphasized output

differential voltage at OUT0±

Measured with 8T pattern

HOST_EQ0 = H

410 mVp-p

HOST_EQ0 = F 550 mVp-p

HOST_EQ0 = R 545 mVp-p

HOST_EQ0 = L 532 mVp-p

Output rise and fall time

Measured with 8T Pattern, 20% – 80%

amplitude

45 ps

OUT0-SDD22

Output differential return loss

(1)

Measured with the device powered up and

outputs a 10-MHz clock signal

SDD22, 10 MHz – 2.8 GHz

–24 dB

SDD22, 2.8 GHz – 6 GHz –16 dB

SDD22, 6 GHz – 11.1 GHz –15 dB

OUT0-SCC22

Output common-mode return

loss

(1)

Measured with the device powered up and

outputs a 10-MHz clock signal.

SCC22, 10 MHz – 4.75 GHz

–12 dB

SCC22, 4.75 GHz – 11.1 GHz –9 dB

OUT0_CM

AC common-mode voltage on

OUT0±

(1)

Default setting, PRBS31, 11.88 Gbps 8 mV (rms)

RECLOCKER OUTPUT JITTER (EQ MODE)

EQ_MODE

Total jitter, reclocked output

(1)(3)

Measured at OUT0±, with SDI_OUT

disabled (BER ≤ 1E-12), PRBS10,

TX launch amplitude = 800 mVp-p before

cable to SDI_IO+

11.88 Gbps: 75-m Belden 1694A

0.14 0.18

UIp-p

5.94 Gbps: 120-m Belden 1694A 0.1

2.97 Gbps: 200-m Belden 1694A 0.1

1.485 Gbps: 300-m Belden 1694A 0.1

270 Mbps: 600-m Belden 1694A 0.11

RAW

Total jitter, with CDR bypassed

Measured at OUT0±, with SDI_OUT

disabled (BER ≤ 1E-12), PRBS10,

TX launch amplitude = 800 mVp-p before

cable to SDI_IO+

125 Mbps: 600-m Belden 1694A

0.2 UIp-p

剩余55页未读，继续阅读

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