TJA1101B：面向汽车应用的100BASE-T1以太网PHY数据手册

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TJA1101B是一款专为汽车应用设计的100BASE-T1以太网物理层(PHY)芯片，它针对如车载网关、IP摄像头连接、雷达模块、驾驶员辅助系统以及基础网络等场景进行了优化。这款芯片旨在提供在单根无屏蔽双绞线上传输和接收100Mbps数据的能力，支持最长15米的电缆长度，确保在汽车环境中的可靠性和耐用性，符合ISO 26262标准，达到ASIL-A等级，这强调了安全性能。 TJA1101B的主要特性包括： 1. **兼容性**：支持MII (Management Interface) 和 RMII (Reduced Media Independent Interface) 接口，这使得它能够与多种微控制器或处理器无缝集成，简化系统设计。 2. **小型化封装**：采用紧凑的36引脚高压硅胶扁平封装（HVQFN），占用空间小，有利于在有限的空间内集成到汽车电子设备中。 3. **低功耗设计**：考虑到汽车行业的能源效率需求，该芯片优化了电源管理，实现始终在线的电源域，可以直接连接到电池供电，无需额外的电压调节器，从而降低了能耗。 4. **安全性与ASIL-A合规**：作为ASIL-A级别的产品，TJA1101B内置了足够的安全功能，确保在系统层面满足ASIL的要求。用户可以根据需要获取相关的安全手册和其他补充文档，以满足汽车行业的严格安全标准。 5. **睡眠和唤醒请求转发**：支持OPEN Alliance TC-10标准的休眠和唤醒请求转发功能，允许设备在不活跃时进入低功耗状态，在需要时快速响应，提高能源利用效率。 6. **适用场景广泛**：由于其高度的适应性和可靠性，TJA1101B不仅适用于汽车内部网络，还适用于那些对数据传输速度、安全性和能效有高要求的应用，比如自动驾驶系统的通信链路。 TJA1101B以太网PHY芯片是汽车电子行业中一个重要的组件，它的设计和特性使它成为构建高效、安全、低成本汽车网络的理想选择。通过了解并应用这些特性，系统设计师可以更轻松地构建出满足现代汽车系统要求的网络解决方案。

4f4d817c-f0a7-4f46-afd7-6c8d464c2a07

NXP Semiconductors

TJA1101B

100BASE-T1 PHY for automotive Ethernet

aaa-022189

PHY

MAC/

SWITCH

CLK_IN_OUT

25 MHz

25 MHz clock to

other PHYs or

switch (optional)

TXEN TXEN

CRSDV CRSDV

RXD[1:0]RXD[1:0]

TXD[1:0] TXD[1:0]

RXER RXER

REF_CLK REF_CLK

XIXO

a. Using external XTAL showing optional 25 MHz clock

output

aaa-022190

PHY

MAC/

SWITCH

TXEN TXEN

CRSDV CRSDV

RXD[1:0]RXD[1:0]

TXD[1:0] TXD[1:0]

RXER RXER

REF_CLK REF_CLK

XIXO

50 MHz

oscillator

b. Using external reference clock

aaa-022191

PHY

MAC/

SWITCH

CLK_IN_OUT

TXEN TXEN

CRSDV

RXD[1:0]

TXD[1:0] TXD[1:0]

RXER

REF_CLK REF_CLK

XIXO

25 MHz clock from

other PHY or switch

c. Using externally generated 25 MHz reference clock

Figure 5. RMII signaling

6.2.3 Reverse MII

In Reverse MII mode, two PHYs are connected back-to-back via the MII interface to

realize a repeater function on the physical layer (see Figure 6). The MII signals are cross-

connected: RX output signals from one PHY are connected to the TX inputs on the other

PHY. The TXC and RXC clock signals become inputs on the PHY connected in Reverse

MII mode. Reverse MII mode is selected by setting bits MII_MODE = 11

Since the MII interface is a standard solution, two PHYs could be used to implement

two different physical layers to realize, for example, a conversion from Fast Ethernet to

100BASE-T1 and vice versa. Another use case for such a repeater could be to double

the link length to 30 m.

Product data sheet Rev. 1 — 1 March 2021

10 / 58

Provided under NDA only

COMPANY PROPRIETARY

ZF Friedrichshafen AG

4e49db35-6666-450f-86c1-48f47fa8f672

4f4d817c-f0a7-4f46-afd7-6c8d464c2a07

NXP Semiconductors

TJA1101B

100BASE-T1 PHY for automotive Ethernet

aaa-038995

XIXO XI XO

TJA1101B

(Reverse MII)

PHY 100Base-TX

25 MHz

XTAL

25 MHz

XTAL

TXC

TXER

TXEN

TXD[3:0]

RXDV

MDI

Fast Ethernet

MDI

100Base-T1

RXD[3:0]

RXER

RXC

RXER

RXDV

RXD[3:0]

TXEN

TXD[3:0]

TXER

TXC

Figure 6. Fast Ethernet to 100BASE-T1 media converter with TJA1101B in Reverse MII

6.3 System controller

6.3.1 Operating modes

6.3.1.1 Power-off mode

The TJA1101B remains in Power-off mode as long as the voltage on pin V

BAT

is below

the power-on reset threshold. The analog blocks are disabled and the digital blocks are in

a passive reset state in this mode.

6.3.1.2 Standby mode

At power-on, when the voltage on pin V

BAT

rises above the under-voltage recovery

threshold (V

uvr(VBAT)

), the TJA1101B enters Standby mode and switches on the INH

control output (pin INH HIGH). This control signal may be used to activate the supply to

the microcontroller in the ECU. Once the 3.3 V supply voltage is available, the internal

1.8 V regulator is activated (if selected) and the PHY is configured according to the pin

strapping implemented on the CONFIGn and PHYADn pins. No SMI access takes place

during the power-on settling time (t

s(pon)

From an operating point of view, Standby mode corresponds to the IEEE 802.3 Power-

down mode, where the transmit and receive functions (in the PHY) are disabled. Standby

mode also acts as a fail-silent mode. The TJA1101B switches to Standby mode when an

undervoltage condition is detected on V

DDA(3V3)

, V

DDD(3V3)

, V

DDD(1V8)

or V

DD(IO)

6.3.1.3 Normal mode

To establish a communication link, the TJA1101B must be switched to Normal mode,

either autonomously (AUTO_OP = 1; see Table 30) or via an SMI command from the

host (AUTO_OP = 0).

When the TJA1101B is configured for autonomous operation, the PHY enters Normal

mode automatically and activates the link on power-on. When the TJA1101B is host-

controlled, the PHY must be enabled via the SMI.

When the PHY is enabled and enters Normal mode, the internal PLL starts running and

the transmit and receive functions (both PCS and PMA) are enabled. After a period of

stabilization, t

init(PHY)

, the PHY is ready to set up a link.

Product data sheet Rev. 1 — 1 March 2021

11 / 58

Provided under NDA only

COMPANY PROPRIETARY

ZF Friedrichshafen AG

4e49db35-6666-450f-86c1-48f47fa8f672

4f4d817c-f0a7-4f46-afd7-6c8d464c2a07

NXP Semiconductors

TJA1101B

100BASE-T1 PHY for automotive Ethernet

If link control is enabled (LINK_CONTROL = 1; see Table 20), a PHY configured as

Master initiates the training sequence by transmitting an idle pattern. The receiver of

a PHY configured as Slave will attempt to synchronize with the idle pattern. Once the

descrambler is synchronized (SCR_LOCKED = 1), the slave PHY itself starts sending an

idle pattern using the recovered clock signal.

The link is established (LINK_STATUS = 1) when the TJA1101B PHY and the remote

PHY indicate that their local receiver status is OK.

6.3.1.4 Disable mode

When the Ethernet interface is not in use or must be disabled for fail-safe reasons, the

PHY can be switched off by pulling pin EN LOW. The PHY is switched off completely in

Disable mode, minimizing power consumption. The configuration register settings are

maintained. EN must be forced HIGH to exit Disable mode and activate the PHY.

6.3.1.5 Sleep mode

If the network manager decides to withdraw a node from the network because it is no

longer needed, the PHY can be switched to Sleep mode (powering down the entire

ECU).

In Sleep mode, the transmit and receive functions are switched off and no signal is driven

onto the twisted-pair lines. Transmit requests from the MII interface are ignored and the

MII output pins are in a high-ohmic state. The only valid SMI operations in Sleep mode

are reading the POWER_MODE status bits in the Extended control register and issuing a

Standby mode command (POWER_MODE = 1100; see Table 20).

Releasing the INH output (INH LOW) allows the ECU to switch off its main power supply

unit. Typically, the entire ECU is powered-down. The TJA1101B is kept partly alive by the

permanent battery supply and can still react to activity on the Ethernet lines. Once valid

Ethernet idle pulses longer than t

det(PHY)

are detected on the lines (with REMWUPHY =

1), the TJA1101B wakes up in Standby mode and switches on the main power unit

via the INH control signal. The TJA1101B PHY enters Normal mode via autonomous

operation once the supply voltages are stable within their operating ranges, or can be

switched to Normal mode via an SMI command if host-controlled. The communication

link to the partner can then be re-established.

Sleep mode can be entered from Normal mode via the intermediate Sleep Request mode

as well as from Standby mode, as shown in Figure 7. Note that the configuration register

settings are maintained in Sleep mode.

If CLK_IN_OUT is used to provide the clock for other devices (e.g. other PHYs), the

clock signal can be configured to remain active (CLK_HOLD = 1) along with INH even

when the PHY is in Sleep mode or disabled. When CLK_HOLD = 1, the device enters

Sleep mode automatically but remains active until a FORCE_SLEEP SMI command is

received. Note that this command forces the PHY to Sleep mode immediately (if it was

not already in Sleep mode).

6.3.1.6 Sleep Request mode

Sleep Request mode is an intermediate state used to initiate a transition to Sleep mode.

In Sleep Request mode, the PHY transmits scrambler code with an encoded LPS

command to inform the link partner about the request to enter Sleep mode.

The PHY sleep request timer (t

to(req)sleep

; see Table 37) starts when the TJA1101B

enters Sleep Request mode. This timer determines the maximum length of time the PHY

Product data sheet Rev. 1 — 1 March 2021

12 / 58

Provided under NDA only

COMPANY PROPRIETARY

ZF Friedrichshafen AG

4e49db35-6666-450f-86c1-48f47fa8f672

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