5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D36
DDR_B_D63
DDR_B_MA15
DDR_B_DM6
DDR_B_D39
DDR_B_BS1
DDR_B_MA7
DDR_B_MA0
DDR_B_DQS7
DDR_B_D46
DDR_B_DQS#5
DDR_B_DM4
DDR_B_D44
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_MA6
DDR_B_DQS#7
DDR_B_D52
DDR_B_DQS5
DDR_B_D54
DDR_B_D45
DDR_B_D60
M_ODT2
DDR_B_D37
DDR_B_MA14
DDR_B_D55
DDR_B_MA4
DDR_B_D62
DDR_B_D53
DDR_B_D47
M_ODT3
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_D38
DDR_B_MA11
DDR_B_D61
DDR_B_MA2
SMB_CLK_S3
SMB_DATA_S3
DDR_B_DQS6
DDR_B_D35
DDR_B_MA12
DDR_B_DQS4
DDR_B_D42
DDR_CKE2_DIMMB
DDR_B_D59
DDR_B_MA3
DDR_CS3_DIMMB#
DDR_B_WE#
DDR_B_D57
DDR_B_D51
DDR_B_D33
DDR_B_D58
DDR_B_DM5
DDR_B_MA8
DDR_B_MA10
DDR_B_DQS#6
DDR_B_D40
DDR_B_MA9
DDR_B_DQS#4
DDR_B_D49
DDR_B_BS2
DDR_B_DM7
DDR_B_MA1
DDR_B_BS0
DDR_B_CAS#
DDR_B_MA5
DDR_B_D56
DDR_B_D43
DDR_B_D34
DDR_B_D48
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_D32
DDR_B_MA13
DDR_B_D50
DDR_B_D41
DDR_B_DM6
DDR_B_DM7
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
+VREF_CB
DDR_B_D5
DDR_B_D22
DDR_B_D14
DDR_B_DQS#0
DDR_B_D31
DDR_B_D12
DDR_B_D6
DDR_B_DQS0
DDR_B_DM2
DDR_B_DM1
DDR_B_D28
DDR_B_D4
DDR_B_D30
DDR_B_DQS3
DDR3_DRAMRST#
DDR_B_D29
DDR_B_D7
DDR_B_D13
DDR_B_D20
DDR_B_D21
DDR_B_D15
DDR_B_D23
DDR_B_DQS#3
DDR_CKE3_DIMMB
DDR_B_D26
DDR_B_D2
DDR_B_D25
+VREF_DQ_DIMMB
DDR_B_D0
DDR_B_DM0
DDR_B_D19
DDR_B_DQS2
DDR_B_D10
DDR_B_D27
DDR_B_D3
DDR_B_D1
DDR_B_D16
DDR_B_DM3
DDR_B_D9
DDR_B_DQS#1
DDR_B_D24
DDR_B_D18
DDR_B_DQS#2
DDR_B_D11
DDR_B_D8
DDR_B_DQS1
DDR_B_D17
DDR3_DRAMRST# <7,12>
DDR_B_DQS#[0..7]<7>
DDR_B_D[0..63]<7>
DDR_B_DQS[0..7]<7>
DDR_B_MA[0..15]<7>
DDR_CKE3_DIMMB <7>
M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>
DDR_B_BS1 <7>
DDR_B_RAS# <7>
DDR_CS2_DIMMB# <7>
M_ODT2 <7>
M_ODT3 <7>
SMB_DATA_S3 <12,15,37>
SMB_CLK_S3 <12,15,37>
DDR_B_BS2<7>
DDR_CKE2_DIMMB<7>
M_CLK_DDR2<7>
M_CLK_DDR#2<7>
DDR_B_BS0<7>
DDR_B_WE#<7>
DDR_B_CAS#<7>
DDR_CS3_DIMMB#<7>
+0.75VS
+3VS
+1.5V
+VREF_DQ_DIMMB
+1.5V
+0.75VS
+1.5V
+VREF_DQ_DIMMB
+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT2
13 63Wednesday, January 05, 2011
2010/11/30 2011/08
Compal Electronics, Inc.
PIQY0 LA6881P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT2
13 63Wednesday, January 05, 2011
2010/11/30 2011/08
Compal Electronics, Inc.
PIQY0 LA6881P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT2
13 63Wednesday, January 05, 2011
2010/11/30 2011/08
Compal Electronics, Inc.
PIQY0 LA6881P
Layout Note:
Place near DIMM
3A@1.5V
3A@1.5V3A@1.5V
3A@1.5V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
0.65A@0.75V
1*0402 0.1uf 1*0402 2.2uf
3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)
3*0805 10uf
VTT(0.75V) =
4*0402 1uf
1*0402 0.1uf
VDDQ(1.5V) =
1*0402 2.2uf
VDDSPD (3.3V)=
For Arranale only +VREF_DQ_DIMMB
supply from a external 1.5V voltage divide
circuit.
07/17/2009
Layout Note:
Place near DIMM
Layout Note:
Short to ground
(10uF_0603_6.3V)*8
(0.1uF_402_10V)*4
C171
0.1U_0402_10V6K
C171
0.1U_0402_10V6K
1
2
R85
1K_0402_1%
R85
1K_0402_1%
12
JDIMM2
LCN_DAN06-K4926-0100
ME@
JDIMM2
LCN_DAN06-K4926-0100
ME@
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT#
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VTT1
203
VTT2
204
G2
206
G1
205
C161
10U_0603_6.3V6M
@
C161
10U_0603_6.3V6M
@
1
2
C170
0.1U_0402_10V6K
C170
0.1U_0402_10V6K
1
2
R86
1K_0402_1%
R86
1K_0402_1%
12
R87
1K_0402_1%
R87
1K_0402_1%
12
C163
10U_0603_6.3V6M
C163
10U_0603_6.3V6M
1
2
C178
0.1U_0402_10V6K
C178
0.1U_0402_10V6K
1
2
C159
0.1U_0402_10V6K
C159
0.1U_0402_10V6K
1
2
C168
10U_0603_6.3V6M
C168
10U_0603_6.3V6M
1
2
C177
2.2U_0603_6.3V6K
C177
2.2U_0603_6.3V6K
1
2
C176
1U_0402_6.3V6K
C176
1U_0402_6.3V6K
1
2
C164
10U_0603_6.3V6M
C164
10U_0603_6.3V6M
1
2
C157
0.1U_0402_10V6K
C157
0.1U_0402_10V6K
1
2
C174
1U_0402_6.3V6K
C174
1U_0402_6.3V6K
1
2
C173
1U_0402_6.3V6K
C173
1U_0402_6.3V6K
1
2
C169
0.1U_0402_10V6K
C169
0.1U_0402_10V6K
1
2
C175
1U_0402_6.3V6K
C175
1U_0402_6.3V6K
1
2
C162
10U_0603_6.3V6M
@
C162
10U_0603_6.3V6M
@
1
2
R97 10K_0402_5%R97 10K_0402_5%
1 2
R95
10K_0402_5%
R95
10K_0402_5%
1 2
C166
10U_0603_6.3V6M
C166
10U_0603_6.3V6M
1
2
R84
1K_0402_1%
R84
1K_0402_1%
12
C172
0.1U_0402_10V6K
C172
0.1U_0402_10V6K
1
2
C167
10U_0603_6.3V6M
C167
10U_0603_6.3V6M
1
2
C160
2.2U_0603_6.3V6K
C160
2.2U_0603_6.3V6K
1
2
C158
2.2U_0603_6.3V6K
C158
2.2U_0603_6.3V6K
1
2
C165
10U_0603_6.3V6M
C165
10U_0603_6.3V6M
1
2