Development of FPGA Toolbox for Implementation of
Spiking Neural Networks
QingXiang Wu, Xiaodong Liao, Xi Huang, Rongtai Cai and Jianyong Cai, Jinqing Liu
Key Laboratory of OptoElectronic Science and Technology for Medicine of Ministry of Education
College of Photonic and Electronic Engineering, Fujian Normal University
Fuzhou, Fujian, 350007, China
qxwu@fjnu.edu.cn
Abstract—Since more and more new findings and principles of
intelligence emerge from neuroscience, spiking neural
networks become important topics in artificial intelligence
domain. However, as high computational complexity of spiking
neural networks it is difficult to implement them efficiently
using software simulation. In this paper a new hardware
implementation method is proposed. In order to implement
spiking neural networks more simply, efficiently and rapidly, a
toolbox, which is composed of components of spiking neural
networks, is developed for neuroscientists, computer scientists
and electronic engineers to implement and simulate spiking
neural networks in hardware. Using the toolbox a spiking
neural network is easy to implement on a FPGA (Field
Programmable Gate Arrays) chip, because the toolbox takes
advantages of Xilinx System Generator and works in Matlab
Simulink environment. The graphic user interface enables
users easy to design and simulate spiking neural networks on
FPGAs and speed up run-time. This paper presents the
methodology in development of the toolbox and the examples
are used to show its promising application.
Keywords-spiking neural networks;hardware implementation;
neuron model; toolbox; FPGA
I.
I
NTRODUCTION
As spiking neurons are behavioural resemblance to
biological neurons, SNNs (Spiking Neural Networks) have
received a considerable attention in the artificial neural
network community. SNNs are constructed using spiking
neuron models such as integrate-and-fire neuron models
[1,2,3] and plasticity synapses[4,5,6]. Based on the spiking
neuron models, spiking neural networks [9,11,18,19,20] have
been developed and have been applied to artificial
intelligence domains such as clustering, classification,
pattern recognition and robot control. Maass has proved that
the spiking neural networks are computationally more
powerful than classical neural networks [3]. SNNs attempt to
emulate information processing in the mammalian brain
based on massively parallel arrays of neurons. As large scale
of SNNs, it is very time consuming for software
implementation. Hardware implementations offer superior
execution speed compared to sequential software approaches
due to the inherent parallelism of hardware [24-26].
Therefore, a number of hardware implementation methods
have been used such as VLSI (vary large scale integrated-
circuits), ASIC(Application Specific Integrated Circuits),
GPU (Graphic Processing Units)[27] and FPGA(Field
Programmable Gate Arrays). VLSI and ASIC
implementations are suitable for large scale of products due
to high cost of development equipment. GPUs usually have
been embedded in a PC graphic card. It is suitable for
application in a computer system. FPGA implementations
are suitable to make SNN chips with low cost development
equipment. In this paper an FPGA Toolbox is developed to
make implementation of SNNs more easily, quickly and
efficiently. This Toolbox allows neuroscientists, computer
scientists and electronic engineers to simulate spiking neural
networks and make their own SNN chips.
II. SNN
M
ODELS
Since the Hodgkin-Huxley neuron model requires very
high computational complexity, a set of spiking neuron
models have been proposed such as the Izhikevich neuron
model, the conductance based integrate-and-fire model and
spike response model.
Comparing with classical neural networks, the key
characteristics are integrate-and-fire models, plasticity
synapses and spike train encoding [7,8,13,18,19]. For
simplicity a spike response model is used to demonstrate the
methodology for development of SNN Toolbox. A general
spike-response neuron model [3,19,20] is shown in Figure 1.
A neuron integrates spike trains from presynaptic neurons
and then generates a spike when the total excitation is larger
than a threshold, which usually is a dynamic function
θ
(t
).
The neurons are connected by multiple synapses
corresponding to different time delays. A synapse response
for a spike varies with time. The function represented by ε(t -
t
j
(k)
), where t
j
(k)
is firing time of neuron u
j
. An approximate
biological response function is alpha response function.
τ
τ
ε
t
e
t
t
Δ
−
Δ
=Δ
1
)(
where (
Δ
t=t-t
j
(k)
). Many simplified mathematic functions are
also applied in some computational spiking neural networks.
The information transferred between the neurons is
represented by means of spike train encoding. Typical
encoding schemes [7,8,13,18,19] are classified in two types
i.e. firing rate encoding and precise time encoding.
2015 Fifth International Conference on Communication Systems and Network Technologies
978-1-4799-1797-6/15 $31.00 © 2015 IEEE
DOI 10.1109/CSNT.2015.216
806