TI TLV2548-EP：12位低功耗串行ADC技术规格

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"TI-TLV2548-EP.pdf 是一款由德州仪器（TI）生产的高性能、低功耗12位串行模拟-to-数字转换器（ADC），适用于国防、航空航天以及医疗应用。该器件具备200千样本每秒（KSPS）的最高吞吐速率，并具有内置参考电压、转换时钟以及8通道输入，支持自动电源关闭功能。" TI的TLV2548-EP是一款高集成度的ADC，其特点包括： 1. **宽电源电压范围**：工作电压范围从3.0伏直流到5.5伏直流，这使得该设备能够适应多种供电环境。 2. **高性能**：在12kHz的信号频率下，它提供了70分贝的信噪比（SNR）和75分贝的无杂散动态范围（SFDR），确保了高质量的信号转换。 3. **低功耗设计**：特别适合于对功耗敏感的应用，它具备自动电源关闭模式，可以进一步降低待机功耗。 4. **8通道输入**：支持4/8通道配置，可连接多个模拟信号源，适合作为多路采样系统的一部分。 5. **内置参考电压、转换时钟**：减少了外部组件的需求，简化了电路设计。 6. **SPI兼容串行接口**：采用SPI（CPOL=0, CPHA=0）协议，最大支持20MHz的SCLK，便于与微控制器或数字信号处理器接口。 7. **控制与编程灵活性**：硬件控制和可编程特性，使得用户可以根据具体应用需求进行配置。 8. **高精度**：差分/积分非线性误差仅为±1.2 LSB，确保了高精度的转换结果。 9. **温度范围广泛**：提供军用级（-55°C至125°C）的温度范围，增强了在恶劣环境中的稳定性。 10. **产品生命周期管理**：延长的产品生命周期通知和产品可追溯性，确保了长期的供应和支持。此外，该ADC的引脚包括SDO、SDI、SCLK、EOC/(INT)、VCC、A0至A7、CS、REFP、REFM、FS、PWDN、GND、CSTART等，这些引脚用于实现与外部系统的通信、控制和电源管理。 TLV2548-EP是适用于需要高精度、低功耗和多通道采样的系统的理想选择，尤其在要求严格的国防、航空航天和医疗领域中。通过其丰富的特性集和灵活的接口选项，设计师可以轻松地将此ADC集成到他们的系统设计中。

TLV2548-EP

www.ti.com

SLAS668 –OCTOBER 2009

as the channel is selected (after the fifth SCLK). In this case the sampling period is not started until CS has

become inactive. Therefore the non-overlapped CSTART low time must meet the minimum sampling time

requirement. The low–to–high transition of CSTART terminates the sampling period and starts the conversion

period. The conversion clock can also be configured to use either internal OSC or external SCLK. This function is

useful for an application that requires:

• The use of an extended sampling period to accommodate different input source impedance.

• The use of a faster I/O clock on the serial port but not enough sampling time is available due to the fixed

number of SCLKs. This could be due to a high input source impedance or due to higher MUX ON resistance

at lower supply voltage.

Once the conversion is complete, the processor can initiate a read cycle by using either the read FIFO command

to read the conversion result or by simply selecting the next channel number for conversion. Since the device

has a valid conversion result in the output buffer, the conversion result is simply presented at the serial data

output. To completely get out of the extended sampling mode, CS must be toggled twice from a high-to-low

transition while CSTART is high. The read cycle mentioned above followed by another configuration cycle of the

ADC qualifies this condition and successfully puts the ADC back to its normal sampling mode. This can be

viewed in Figure 9.

Table 5. Sample and Convert Conditions

CONDITIONS SAMPLE CONVERT

No sampling clock (SCLK) required.

Sampling period is totally controlled by the low

time of CSTART. The high–to–low transition

of CSTART (when CS = 1) starts the sampling

CS = 1 of the analog input signal. The low time of

CSTART (see Figure 11 and CSTART dictates the sampling period. The

Figure 19) low–to–high transition of CSTART ends

sampling period and begins the conversion

cycle. (Note: this trigger only works when

internal reference is selected for conversion

modes 01, 10, and 11.)

1) If the internal clock OSC is selected, a

maximum conversion time of 3.86 μs can be

CSTART = 1 SCLK is required. Sampling period is

achieved.

FS = 1 programmable under normal sampling. When

2) If external SCLK is selected, conversion

programmed to sample under short sampling,

time is t

conv

= 14 x DIV/f

(SCLK)

, where DIV can

12 SCLKs are generated to complete

be 1, 2, or 4.

sampling period. 24 SCLKs are generated

when programmed for long sampling. A

command set to configure the device requires

4 SCLKs thereby extending to 16 or 28

CSTART = 1

SCLKs respectively before conversion takes

CS = 0

place. (Note: Because the ADC only bypasses

a valid channel select command, the user can

use select channel 0, 0000b, as the SDI input

when either CS or FS is used as trigger for

conversion. The ADC responds to commands

such as SW powerdown, 1000b.)

TLV2548 Conversion Modes

The TLV2548 has four different conversion modes (mode 00, 01, 10, 11). The operation of each mode is slightly

different, depending on how the converter performs the sampling and which host interface is used. The trigger for

a conversion can be an active CSTART (extended sampling), CS (normal sampling, SPI interface), or FS (normal

sampling, TMS320 DSP interface). When FS is used as the trigger, CS can be held active, i.e. CS does not need

to be toggled through the trigger sequence. SDI can be one of the channel select commands, such as SELECT

CHANNEL 0. Different types of triggers should not be mixed throughout the repeat and sweep operations. When

CSTART is used as the trigger, the conversion starts on the rising edge of CSTART. The minimum low time for

CSTART is equal to t

(SAMPLE)

. If an active CS or FS is used as the trigger, the conversion is started after the 16th

or 28th SCLK edge. Enough time (for conversion) should be allowed between consecutive triggers so that no

conversion is terminated prematurely.

One Shot Mode (Mode 00)

One shot mode (mode 00) does not use the FIFO, and the EOC is generated as the conversion is in progress (or

INT is generated after the conversion is done).

Product Folder Link(s): TLV2548-EP

TLV2548-EP

SLAS668 –OCTOBER 2009

www.ti.com

Repeat Mode (Mode 01)

Repeat mode (mode 01) uses the FIFO. This mode setup requires configuration cycle and channel select cycle.

Once the programmed FIFO threshold is reached, the FIFO must be read, or the data is lost when the sequence

starts over again with the SELECT cycle and series of triggers. No configuration is required except for

re-selecting the channel unless the operation mode is changed. This allows the host to set up the converter and

continue monitoring a fixed input and come back to get a set of samples when preferred.

Triggered by CSTART: The first conversion can be started with a select cycle or CSTART. To do so, the user

can issue CSTART during the select cycle, immediately after the 4-bit channel select command. The first sample

started as soon as the select cycle is finished (i.e., CS returns to 1). If there is enough time (2 μs) left between

the SELECT cycle and the following CSTART, a conversion is carried out. In this case, you need one less trigger

to fill the FIFO. Succeeding samples are triggered by CSTART.

Sweep Mode (Mode 10)

Sweep mode (mode 10) also uses the FIFO. Once it is programmed in this mode, all of the channels listed in the

selected sweep sequence are visited in sequence. The results are converted and stored in the FIFO. This sweep

sequence may not be completed if the FIFO threshold is reached before the list is completed. This allows the

system designer to change the sweep sequence length. Once the FIFO has reached its programmed threshold,

an interrupt (INT) is generated. The host must issue a read FIFO command to read and clear the FIFO before

the next sweep can start.

Repeat Sweep Mode (Mode 11)

Repeat sweep mode (mode 11) works the same way as mode 10 except the operation has an option to continue

even if the FIFO threshold is reached. Once the FIFO has reached its programmed threshold, an interrupt (INT)

is generated. Then two things may happen:

1. The host may choose to act on it (read the FIFO) or ignore it. If the next cycle is a read FIFO cycle, all of the

data stored in the FIFO is retained until it has been read in order.

2. If the next cycle is not a read FIFO cycle, or another CSTART is generated, all of the content stored in the

FIFO is cleared before the next conversion result is stored in the FIFO, and the sweep is continued.

Table 6. TLV2548 Conversion Mode

(1) (2) (3)

CONVERSION CFR SAMPLING

OPERATION

MODE D(6,5) TYPE

• Single conversion from a selected channel

• CS or FS to start select/sampling/conversion/read

Normal

• One INT or EOC generated after each conversion

• Host must serve INT by selecting channel, and converting and reading the

previous output.

One shot 00

• Single conversion from a selected channel

• CS to select/read

• CSTART to start sampling and conversion

Extended

• One INT or EOC generated after each conversion

• Host must serve INT by selecting next channel and reading the previous

output.

(1) Programming the EOC/INT pin as the EOC signal works for mode 00 only. The other three modes automatically generate an INT signal

irrespective of how EOC/INT is programmed.

(2) Extended sampling mode using CSTART as the trigger only works when internal reference is selected for conversion modes 01, 10, and

11.

(3) When using CSTART to sample in extended mode, the falling edge of the next CSTART trigger should occur no more than 2.5 μs after

the falling CS edge (or falling FS edge if FS is active) of the channel select cycle. This is to prevent an ongoing conversion from being

canceled.

Product Folder Link(s): TLV2548-EP

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