Chisel语言中文版：硬件设计入门

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"Chisel语言中文版" Chisel是一种硬件描述语言，它允许程序员用类似于高级编程语言的方式来描述数字电路。这本书是关于如何使用Chisel进行硬件设计的指南，特别适合初学者和对硬件设计感兴趣的读者。书中通过实例详细介绍了如何使用Chisel构建从小到中型的硬件组件。首先，作者在前言中提到，这本书的目标是让读者了解如何利用Chisel进行硬件设计，并探索其在实际应用中的潜力。书中会逐步深入，逐步介绍各种硬件设计概念。在安装Chisel和FPGA工具的章节中，提供了在macOS、Linux/Ubuntu、Windows等不同操作系统下的安装步骤，以及如何配置FPGA工具，如Xilinx Vivado或Intel Quartus。这对于实际动手实践至关重要，因为Chisel设计通常需要在FPGA上进行验证。接着，"HelloWorld"章节引导读者完成第一个Chisel程序，这是一个简单的示例，帮助读者快速熟悉Chisel的基本语法和环境设置。ChiselHelloWorld进一步介绍了如何在Chisel中编写基本的硬件结构。 Chisel的集成开发环境（IDE）部分，讲解了如何配置和使用支持Chisel的IDE，例如使用IntelliJ IDEA或Scala的sbt构建系统。这些工具能提升开发效率，便于代码管理和调试。书中还详细解释了Chisel的基本构成元素，如信号类型和常量，以及如何构建组合电路和状态机。例如，复用器（Multiplexer）的实现展示了如何在Chisel中处理逻辑选择，而状态寄存器则涉及到了时序逻辑的设计，包括计数器的构建。此外，还介绍了如何利用Chisel生成硬件描述语言（VHDL或Verilog）代码，这使得Chisel设计能够被传统的FPGA/ASIC工具链接受。在搭建和测试过程中，书里详细描述了如何使用sbt管理Chisel项目，以及如何进行单元测试，包括PeekPokeTester和ScalaTest的使用，以及printf调试方法。最后，书中通过具体的组件（如运算逻辑单元）的构建，演示了如何组合Chisel模块以创建更复杂的硬件设计。书中强调了使用函数来实现轻量级组件的重要性，这样可以提高代码的可重用性和模块化。这本书全面覆盖了Chisel语言的基础和应用，是学习硬件描述语言和数字电路设计的理想资源。通过实践书中的例子和练习，读者将能够熟练掌握Chisel，并具备使用该语言设计和验证数字电路的能力。

例如

50MHz

，我们需要一个计数器来分频得到

级别的频率来实现可视化的闪烁。在这个例子

中我们从

计数到

25000000-1,

然后触发闪烁信号

(blkReg := ~blkReg) ,

然后复位计数器

(cntReg :=

0.U)。这个硬件以1 Hz频率闪烁LED。

3.4 Chisel的的的IDE

This book makes no assumptions about your programming environment or editor to use. Learning of the

basics should be easy with just using sbt at the command line and an editor of your choice. In the tradition

of other books, all commands that you shall type in a shell/terminal/CLI are preceded by a $ character,

which you shall not type in. As an example, here is the Unix ls command, which lists ﬁles in the current

folder:

这本书没有假设你的编程环境和使用的编辑器。在命令行中使用

sbt

同时使用一个你偏好

的编辑器可以很容易的入门。在其他传统的书籍中，所有你需要键入终端的命令之前会有一

个$字符，这个字符你不需要输入。一个例子，Unix的列出当前文件夹下的文件ls 命令：

$ ls

That said, an integrated development environment (IDE), where a compiler is running in the back-

ground, can speed up coding. As Chisel is a Scala library, all IDEs that support Scala are also good IDEs

for Chisel. It is possible in IntelliJ and Eclipse to generate a project from the sbt project conﬁguration in

build.sbt.

也就是说，一个编译器后台运行的集成开发环境

(IDE)

，可以加速编程。因为

Chisel

是

一个

Scala

库，所有的

IDEs

都支持

Scala

，也支持

Chisel

。在

IntelliJ

和

Eclipse

中生成一个包

含build.sbt配置文件的sbt工程是可行了。

In IntelliJ you can create a new project from existing sources with: File - New - Project from Existing

Sources... and then select the build.sbt ﬁle from the project.

在

IntelliJ

，你可以通过

File - New - Project from Existing Sources...

创建新的项目，从已有的资

源，然后选择项目的build.sbt文件。

In Eclipse you can create a project via 在Eclipse你可以建立一个项目通过

$ sbt eclipse

and import that project into Eclipse.

并且导入一个工程入Eclipse。

Visual Studio Code is another option for a Chisel IDE. TheScala Metals extension provides Scala

support. On the left bar select Extensions and search for Metals and install Scala (Metals). To import an

sbt based project open the folder with File - Open.

Visual Studio Code

是另一个

Chisel IDE

的选项。

Scala Metals

拓展提供了

Scala

支持。左侧栏

选择

Extensions

，搜索

Metals

，安装

Scala (Metals).

为了引入

sbt

为基础的项目，

File - Open

打开

文件夹。

This function needs the Eclipse plugin for sbt.

这个功能需要sbt的Eclipse插件。

3.5 访访访问问问源源源码码码和和和电电电子子子书书书功功功能能能

This book is open source and hosted at GitHub: chisel-book. All Chisel code examples, shown in this

book, are included in the repository. The code compiles with a recent version of Chisel, and many

examples also include a test bench. We collect larger Chisel examples in the accompanying repository

chisel-examples. If you ﬁnd an error or typo in the book, a GitHub pull request is the most convenient

way to incorporate your improvement. You can also provide feedback or comments for improvements by

ﬁling an issue on GitHub or sending a plain, old school email.

这本书是在

GitHub: chisel-book

上开源。书中所有的

Chisel

例子都包含在该仓库中。这些代码

通过最近的

Chisel

版面编译，很多例子都包含了

test bench

。我们收集了很多

Chisel

例子在

chisel-

examples

仓库里。如果你找到了错误或者笔误，可以提交

pull request

。你可以在

github

上记录一

个issue来提供反馈或者评论或者发送一个简单的学校邮件。

This book is freely available as a PDF eBook and in classical printed form. The eBook version features

links to further resources and Wikipedia entries. We use Wikipedia entries for background information

(e.g., binary number system) that does not directly ﬁt into this book. We optimized the format of the

eBook for reading on a tablet, such as an iPad.

这本书有免费的古典印刷体

PDF

电子版。电子书提供了更多的资源和

Wikipedia

入口。我们

使用

Wikipedia

来说明与本书部直接相关的背景知识

(

例如二进制数字系统

)

。我们优化了电子书

的排版，以方便便携式设备阅读，例如ipad。

3.6 更更更多多多读读读物物物

Here a list of further reading for digital design and Chisel:

这儿例出了关于数字电路设计和

Chisel

更深

层次的读物：

•

Digital Design: A Systems Approach, by William J. Dally and R. Curtis Harting, is a modern

textbook on digital design. It is available in two versions: using Verilog or VHDL as a hardware

description language.

Digital Design: A Systems Approach,

作者是

William J. Dally

和

R. Curtis Harting,

，是一本现

代的数字设计的教科书。它有两个版本，使用Verilog或是VHDL作为硬件描述语言。

The ofﬁcial Chisel documentation and further documents are available online:

Chisel官方文档和之后的文档都会更新到网上：

• The Chisel home page is the ofﬁcial starting point to download and learn Chisel.

Chisel主页是开始安装和学习chisel的地方。

•

The Chisel Tutorial provides a ready setup project containing small exercises with testers and

solutions.

Chisel Tutorial 提供了一个准备安装的项目，包括小的测试和解决答案的练习。

The Chisel Wiki contains a short users guide to Chisel and links to further information.

Chisel Wiki包含了小的chisel的用户手册和更多信息的链接。

• The Chisel Testers are in their repository that contains a Wiki documentation.

Chisel Testers 包括在他们的仓库，包含了一个wiki文档。

•

The Generator Bootcamp is a Chisel course focusing on hardware generators, as a Jupyter notebook

Generator Bootcamp 是chisel课程，专注在硬件生成器，作为jupyter notebook。

• A Chisel Style Guide by Christopher Celio.

Chisel Style Guide，作者是Christopher Celio。

•

The chisel-lab contains Chisel exercises for the course “Digital Electronics 2” at the Technical

University of Denmark.

• The chisel-lab 包括用于在丹麦技术大学“Digital Electronics 2” 课程的Chisel练习。

3.7 练练练习习习

Each chapter ends with a hands-on exercise. For the introduction exercise, we will use an FPGA board to

get one LED blinking. As a ﬁrst step clone (or fork) the chisel-examples repository from GitHub. The

Hello World example is in the folder hello-world, set up as a minimal project. You can explore the Chisel

code of the blinking LED in src/main/scala/Hello.scala. Compile the blinking LED with the following

steps:

每个章节结尾都有手写的练习题。为了介绍练习，我们通常会使用一个

FPGA

板子上的一

颗

LED

。第一步

clone

或者

forkchisel-examples

仓库。

Hello World

例子在

hello-world

文件夹里，是

一个最小的工程。你可以探索

LED

闪烁的

Chisel

代码在

src/main/scala/Hello.scala

。按下下述步骤

编译LED闪烁工程：

1 $ g i t c l o ne h t t p s : / / g i t h u b . com / s c h o e b e r l / c h i s e l −ex am pl es . g i t

2 $ cd c h i s e l −e xa mp le s / h e l l o −wo rld /

3 $ make

After some initial downloading of Chisel components, this will produce the Verilog ﬁle Hello.v.

Explore this Verilog ﬁle. You will see that it contains two inputs clock and reset and one output io_led.

When you compare this Verilog ﬁle with the Chisel module, you will notice that the Chisel module does

not contain clock or reset. Those signals are implicitly generated, and in most designs, it is convenient not

to need to deal with these low-level details. Chisel provides register components, and those are connected

automatically to clock and reset (if needed).

在

Chisel

部分下载完成之后，程序会产出一个

Verilog

文件

Hello.v

。浏览这个

Verilog

文件，你

会看到电路包含两个输入

clock

和

reset

和一个输出

io_led

。当你对比

Verilog

文件和

Chisel

模块时，

你将会发现

Chisel

模块申明时不包含

clock

和

reset

。这些信号是隐式生成的，在大部分设计中处

理这些底层细节是不方便的。Chisel提供的寄存器如果需要，会自动连接clock和reset.

The next step is to set up an FPGA project ﬁle for the synthesize tool, assign the pins, and compile

the Verilog code, and conﬁgure the FPGA with the resulting bitﬁle. We cannot provide the details of these

The real process is more elaborated with following steps: synthesizing the logic, performing place and route, performing

timing analysis, and generating a bitﬁle. However, for the purpose of this introduction example we simply call it “compile” your

code.

steps. Please consult the manual of your Intel Quartus or Xilinx Vivado tool. However, the examples

repository contains some ready to use Quartus projects in folder quartus for several popular FPGA boards

(e.g., DE2-115). If the repository contains support for your board, start Quartus, open the project, compile

it by pressing the Play button, and conﬁgure the FPGA board with the Programmer button and one of the

LEDs should blink.

下一步是建立

FPGA

工程文件，分配引脚，然后编译

Verilog

代码，最后利用生成的

bit

文件烧

写进

FPGA

。我们无法提供这些步骤的详细过程。请参考你的

EDA

工具手册。然而，例程仓库

里面包含了一些针对几个流行的

FPGA

的

Quartus

可用的工程在

quartus

文件夹中。如果仓库支持

的板子包括你的FPGA，启动Quartus，打开工程，编译，烧录，然后一个LED将会闪烁。

Gratulation! You managed to get your ﬁrst design in Chisel running in an FPGA! 厉厉厉害害害了了了！！！你你你

成成成功功功在在在FPGA上上上运运运行行行了了了你你你第第第一一一个个个Chisel电电电路路路！！！

If the LED is not blinking, check the status of reset. On the DE2-115 conﬁguration, the reset input

is connected to SW0.

如果

LED

没有闪烁，检查

reset

的状态。在

DE2-115

配置中，

reset

的输入连

接SW0.

Now change the blinking frequency to a slower or a faster value and rerun the build process. Blinking

frequencies and also blinking patterns communicate different “emotions”. E.g., a slow blinking LED

signals that everything is ok, a fast blinking LED signals an alarm state. Explore which frequencies

express best those two different emotions.

现在改变闪烁的频率然后重新运行一遍构建工程。闪烁的频率和闪烁的方式可以预示不同的

状态。例如一个缓慢的闪烁信代表一切正常，一个快速的闪烁信号代表一个报警。探索哪个频

率对应这两个不同的动作。

As a more challenging extension to the exercise, generate the following blinking pattern: the LED

shall be on for 200 ms every second. For this pattern, you might decouple the change of the LED blinking

from the counter reset. You will need a second constant where you change the state of the blkReg register.

What kind of emotion does this pattern produce? Is it alarming or more like a sign-of-live signal?

一个更

具有挑战性的练习，生成一个下述的闪烁模式：

LED

一秒中亮

200 ms

。对于这个模式，你可以

会从计数器复位来分离

LED

的闪烁。你将会需要第二个常量来改变

blkReg

寄存器的状态。这个

模式会产生什么种类的状态呢？是警报还是更像一个正常运行的信号呢？

If you do not have an FPGA board (yet), you can still run the blinking LED example. You will use the

Chisel simulation. To avoid a too long simulation time change the clock frequency in the Chisel code

from 50000000 to 50000. Execute following instruction to simulate the blinking LED:

如果你（还）没有一个

FPGA

板，你仍然可以运行闪烁

LED

利子。你会使用模拟

Chisel

。为

了防止太长的模拟时间，改变

Chisel

代码的时钟频率，从

50000000

改为

50000

。执行以下指令，

去模拟闪烁LED：

1 $ s b t t e s t

This will execute the tester that runs for one million clock cycles. The blinking frequency depends

on the simulation speed, which depends on the speed of your computer. Therefore, you might need to

experiment a little bit with the assumed clock frequency to see the simulated blinking LED.

这会执行测试，运行时钟

100

万次。闪烁频率取决于模拟速度，也就是你的计算机速度。于

是，你需要实验一下，使用假设的时钟频率，去看到模拟的闪烁LED。

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