"eMMC 5.1协议英文资料及标准"

5星 · 超过95%的资源 | 下载需积分: 50 | PDF格式 | 8.28MB | 更新于2024-03-24 | 199 浏览量 | 举报

The Embedded Multi-Media Card (eMMC) Electrical Standard 5.1A, also known as JESD84-B51A, is a protocol established by the JEDEC SOLID STATE TECHNOLOGY ASSOCIATION. This standard, which is a revision of the previous JESD84-B51 released in February 2015, was updated in January 2019. The eMMC 5.1 protocol provides guidelines for the electrical characteristics of embedded multimedia cards, ensuring consistency and compatibility across devices. JEDEC standards are meticulously prepared, reviewed, and approved by the Board of Directors and legal counsel to ensure accuracy and reliability. This standard is crucial in the development and implementation of embedded multimedia cards, which are widely used in various electronic devices such as smartphones, tablets, and IoT devices. By adhering to the eMMC 5.1 protocol, manufacturers can ensure that their products meet the necessary electrical requirements for seamless integration and optimal performance. Overall, the eMMC 5.1 protocol plays a significant role in the advancement of embedded multimedia card technology, fostering innovation and standardization in the industry. JEDEC standards continue to uphold the highest level of quality and integrity to serve the public interest and promote technological advancement.

展开

JEDEC Standard No. 84-B51A

-xii-

Figure A.106 — Heat Removal - Nomenclatures ...................................................................................................... 290

Figure A.107 — FFU flow ........................................................................................................................................ 293

Figure A.108 — Queuing a transaction ..................................................................................................................... 294

Figure A.109 — Execution of a queued task ............................................................................................................. 295

Figure B.110 — Proposed Host System Architecture, with CQE ............................................................................. 298

Figure B.111 — Command Queuing HCI General Architecture ............................................................................... 299

Figure B.112 — Task Queuing Sequence ................................................................................................................. 323

Figure B.113 — Task Execution and Completion Sequence ..................................................................................... 324

Figure B.114 — Task Discard and Clear Sequence Diagram .................................................................................... 325

Tables

Page

Table 1 — e•MMC Voltage Modes ............................................................................................................................... 4

Table 2 — e•MMC interface ......................................................................................................................................... 7

Table 3 — e•MMC registers .......................................................................................................................................... 8

Table 4 — Bus Speed Modes ...................................................................................................................................... 15

Table 5 — CMD line modes overview ........................................................................................................................ 18

Table 6 — EXT_CSD access mode ............................................................................................................................. 42

Table 7 — Bus testing pattern ..................................................................................................................................... 50

Table 8 — 1-bit bus testing pattern ............................................................................................................................. 50

Table 9 — 4-bit bus testing pattern ............................................................................................................................. 51

Table 10 — 8-bit bus testing pattern ........................................................................................................................... 51

Table 11 — Erase command (CMD38) Valid arguments ............................................................................................ 60

Table 12 — Erase command (CMD38) Valid arguments ............................................................................................ 64

Table 13 — Write Protection Hierarchy (when disable bits are clear) ........................................................................ 67

Table 14 — Write Protection Types (when disable bits are clear) .............................................................................. 67

Table 15 — Security Protocol Information ................................................................................................................. 69

Table 16 — Lock Device data structure ...................................................................................................................... 73

Table 17 — Data Frame Files for RPMB .................................................................................................................... 78

Table 18 — RPMB Request/Response Message Types .............................................................................................. 79

Table 19 — RPMB Operation Results data structure .................................................................................................. 79

Table 20 — RPMB Operation Results ........................................................................................................................ 80

Table 21 — MAC Example ......................................................................................................................................... 82

Table 22 — Authentication Key Data Packet .............................................................................................................. 83

Table 23 — Result Register Read Request Packet ...................................................................................................... 84

Table 24 — Response for Key Programming Result Request ..................................................................................... 84

Table 25 — Counter Read Request Packet .................................................................................................................. 85

Table 26 — Counter Value Response.......................................................................................................................... 85

Table 27 — Program Data Packet ............................................................................................................................... 86

Table 28 — Result Register Read Request Packet ...................................................................................................... 87

Table 29 — Response for Data Programming Result Request .................................................................................... 87

Table 30 — Data Read Request Initiation Packet ....................................................................................................... 88

Table 31 — Read Data Packet ..................................................................................................................................... 88

Table 32 — Authenticated Device Configuration Write packet .................................................................................. 89

Table 33 — Response for Authenticated Device Configuration Write Request .......................................................... 90

Table 34 — Authenticated Device Configuration Read Initiation packet ................................................................... 91

Table 35 — Response for Authenticated Device Configuration Read ........................................................................ 91

JEDEC Standard No. 84-B51A

-xiii-

Table 36 — Interruptible commands ........................................................................................................................... 94

Table 37 — Packed Command Structure .................................................................................................................. 101

Table 38 — Features Cross Reference Table ............................................................................................................ 105

Table 39 — e•MMC internal sizes and related Units / Granularities ........................................................................ 108

Table 40 — Admitted Data Sector Size, Address Mode and Reliable Write granularity .......................................... 110

Table 41 — Real Time Clock Information Block Format ......................................................................................... 111

Table 42 — RTC_INFO_TYPE Field Description ................................................................................................... 111

Table 43 — Task Management op-codes .................................................................................................................. 117

Table 44 — Error handling for Command Queue ..................................................................................................... 118

Table 45 — Supported Commands for Command Queue ......................................................................................... 119

Table 46 — Device Configuration Area .................................................................................................................... 120

Table 47 — Command Format .................................................................................................................................. 124

Table 48 — Supported Device command classes (0–56) .......................................................................................... 125

Table 49 — Basic commands (class 0 and class 1) ................................................................................................... 126

Table 50 — Block-oriented read commands (class 2) ............................................................................................... 127

Table 51 — Class 3 commands ................................................................................................................................. 127

Table 52 — Block-oriented write commands (class 4).............................................................................................. 128

Table 53 — Block-oriented write protection commands (class 6) ............................................................................ 129

Table 54 — Erase commands (class 5) ...................................................................................................................... 130

Table 55 — I/O mode commands (class 9) ............................................................................................................... 131

Table 56 — Lock Device commands (class 7) .......................................................................................................... 131

Table 57 — Application-specific commands (class 8) .............................................................................................. 131

Table 58 — Security Protocols (class 10) ................................................................................................................. 132

Table 59 — Command Queue (Class 11) .................................................................................................................. 133

Table 60 — Device state transitions .......................................................................................................................... 134

Table 61 — Device state transitions (cont’d) ............................................................................................................ 135

Table 62 — Device state transitions (cont’d) ............................................................................................................ 136

Table 63 — R1 response ........................................................................................................................................... 136

Table 64 — R2 response ........................................................................................................................................... 137

Table 65 — R3 Response .......................................................................................................................................... 137

Table 66 — R4 response ........................................................................................................................................... 137

Table 67 — R5 response ........................................................................................................................................... 137

Table 68 — Device status .......................................................................................................................................... 139

Table 69 — Device Status field/command - cross reference ..................................................................................... 141

Table 70 — Response 1 Status Bit Valid .................................................................................................................. 142

Table 71 — Timing Parameters ................................................................................................................................. 154

Table 72 — Timing Parameters for HS200 and HS400 mode................................................................................... 155

Table 73 — H/W reset timing parameters ................................................................................................................. 159

Table 74 — OCR register definitions ........................................................................................................................ 161

Table 75 — CID Fields ............................................................................................................................................. 162

Table 76 — Device Types ......................................................................................................................................... 162

Table 77 — Valid MDT “y” Field Values ................................................................................................................. 163

Table 78 — CSD Fields ............................................................................................................................................. 165

Table 79 — CSD register structure ........................................................................................................................... 166

Table 80 — System specification version ................................................................................................................. 166

Table 81 — TAAC access-time definition ................................................................................................................ 166

Table 82 — Maximum bus clock frequency definition ............................................................................................. 167

JEDEC Standard No. 84-B51A

-xiv-

Table 83 — Supported Device command classes ...................................................................................................... 167

Table 84 — Data block length ................................................................................................................................... 167

Table 85 — DSR implementation code table ............................................................................................................ 168

Table 86 — V

(min) current consumption ............................................................................................................. 169

Table 87 — V

(max) current consumption ............................................................................................................ 169

Table 88 — Multiplier factor for device size............................................................................................................. 170

Table 89 — R2W_FACTOR ..................................................................................................................................... 171

Table 90 — File formats ............................................................................................................................................ 172

Table 91 — ECC type ............................................................................................................................................... 172

Table 92 — CSD field command classes .................................................................................................................. 173

Table 93 — Extended CSD ....................................................................................................................................... 174

Table 94 — EXT_SECURITY_ERR byte description .............................................................................................. 179

Table 95 — Device-supported command sets ........................................................................................................... 179

Table 96 — HPI features ........................................................................................................................................... 179

Table 97 — Background operations support ............................................................................................................. 180

Table 98 — Context Management Context Capabilities ........................................................................................... 181

Table 99 — Extended CSD Register Support............................................................................................................ 181

Table 100 — SUPPORTED_MODES ...................................................................................................................... 181

Table 101 — FFU FEATURES ................................................................................................................................. 181

Table 102 — MODE_OPERATION_CODES timeout definition ............................................................................ 182

Table 103 — Device life time estimation type B value ............................................................................................. 183

Table 104 — Device life time estimation type A value ............................................................................................. 184

Table 105 — Pre EOL info value .............................................................................................................................. 184

Table 106 — Optimal read size value ....................................................................................................................... 185

Table 107 — Optimal write size value ...................................................................................................................... 185

Table 108 — Optimal trim unit size value ................................................................................................................ 185

Table 109 — Generic Switch Timeout Definition ..................................................................................................... 186

Table 110 — Power off long switch timeout definition ............................................................................................ 186

Table 111 — Background operations status .............................................................................................................. 187

Table 112 — Correctly programmed sectors number ................................................................................................ 187

Table 113 — Initialization Time out value ................................................................................................................ 187

Table 114 — Cache Flushing Policy ......................................................................................................................... 188

Table 115 — TRIM/DISCARD Time out value........................................................................................................ 188

Table 116 — SEC Feature Support ........................................................................................................................... 189

Table 117 — Secure Erase time-out value ................................................................................................................ 190

Table 118 — Secure Erase time-out value ................................................................................................................ 190

Table 119 — Boot information .................................................................................................................................. 191

Table 120 — Boot partition size ................................................................................................................................ 191

Table 121 — Access size ........................................................................................................................................... 192

Table 122 — Superpage size ..................................................................................................................................... 192

Table 123 — Erase-unit size ...................................................................................................................................... 192

Table 124 — Erase timeout values ............................................................................................................................ 193

Table 125 — Reliable write sector count .................................................................................................................. 193

Table 126 — Write protect group size ....................................................................................................................... 193

Table 127 — S_C_VCC, S_C_VCCQ Sleep Current ............................................................................................... 194

Table 128 — Production State Awareness timeout definition ................................................................................... 194

Table 129 — Sleep/awake timeout values ................................................................................................................. 195

JEDEC Standard No. 84-B51A

-xv-

Table 130 — Sleep Notification timeout values ........................................................................................................ 195

Table 131 — SECURE_WP_INFO ........................................................................................................................... 196

Table 132 — R/W access performance values .......................................................................................................... 197

Table 133 — Power classes ....................................................................................................................................... 198

Table 134 — Partition switch timeout definition ...................................................................................................... 199

Table 135 — Out-of-interrupt timeout definition ...................................................................................................... 199

Table 136 — Supported Driver Strengths ................................................................................................................. 200

Table 137 — Device types ........................................................................................................................................ 201

Table 138 — CSD register structure.......................................................................................................................... 201

Table 139 — Extended CSD revisions ...................................................................................................................... 202

Table 140 — Standard MMC command set revisions ............................................................................................... 202

Table 141 — Power class codes ................................................................................................................................ 202

Table 142 — HS_TIMING (timing and driver strength) ........................................................................................... 203

Table 143 — HS_TIMING Interface values ............................................................................................................. 203

Table 144 — BUS_WIDTH ...................................................................................................................................... 204

Table 145 — Bus Mode Selection ............................................................................................................................. 204

Table 146 — Erased memory content values ............................................................................................................ 204

Table 147 — Boot configuration bytes ...................................................................................................................... 205

Table 148 — Boot configuration protection .............................................................................................................. 206

Table 149 — Boot bus configuration ........................................................................................................................ 206

Table 150 — Bus Width and Timing Mode Transition ............................................................................................. 207

Table 151 — ERASE_GROUP_DEF ........................................................................................................................ 208

Table 152 — BOOT_WP_STATUS ......................................................................................................................... 208

Table 153 — BOOT area Partitions write protection ................................................................................................ 209

Table 154 — User area write protection .................................................................................................................... 211

Table 155 — FW Update Disable ............................................................................................................................. 212

Table 156 — RPMB Partition Size............................................................................................................................ 212

Table 157 — Write reliability setting ........................................................................................................................ 213

Table 158 — Write reliability parameter register ...................................................................................................... 214

Table 159 — Background operations enable ............................................................................................................. 215

Table 160 — H/W reset function ............................................................................................................................... 216

Table 161 — HPI management ................................................................................................................................. 216

Table 162 — Partitioning Support ............................................................................................................................. 217

Table 163 — Max. Enhanced Area Size .................................................................................................................... 217

Table 164 — Partitions Attribute .............................................................................................................................. 218

Table 165 — Partition Setting ................................................................................................................................... 218

Table 166 — General Purpose Partition Size ............................................................................................................ 219

Table 167 — Enhanced User Data Area Size ............................................................................................................ 220

Table 168 — Enhanced User Data Start Address ...................................................................................................... 220

Table 169 — Secure Bad Block management ........................................................................................................... 220

Table 170 — PRODUCTION_STATE_AWARENESS states ................................................................................. 221

Table 171 — PERIODIC_WAKEUP ........................................................................................................................ 222

Table 172 — CMD26 and CMD27 in DDR mode Support ...................................................................................... 222

Table 173 — Initialization Time out value ................................................................................................................ 223

Table 174 — Class 6 usage ....................................................................................................................................... 223

Table 175 — EXCEPTION_EVENTS_CTRL[56] ................................................................................................... 224

Table 176 — EXCEPTION_EVENTS_CTRL[57] ................................................................................................... 224

JEDEC Standard No. 84-B51A

-xvi-

Table 177 — EXCEPTION_EVENTS_STATUS[54] .............................................................................................. 224

Table 178 — EXCEPTION_EVENTS_STATUS[55] .............................................................................................. 224

Table 179 — First Byte EXT_PARTITIONS_ATTRIBUTE[52] ............................................................................. 225

Table 180 — Second Byte EXT_PARTITIONS_ATTRIBUTE[53] ........................................................................ 225

Table 181 — CONTEXT_CONF configuration format ............................................................................................ 226

Table 182 — Packed Command Status Register ....................................................................................................... 226

Table 183 — Valid POWER_OFF_NOTIFICATION values ................................................................................... 227

Table 184 — CACHE ENABLE ............................................................................................................................... 227

Table 185 — FLUSH CACHE .................................................................................................................................. 228

Table 186 — BARRIER_CTRL ................................................................................................................................ 228

Table 187 — Valid MODE_CONFIG values ............................................................................................................ 228

Table 188 — Valid MODE_OPERATION_CODES values ..................................................................................... 229

Table 189 — FFU Status codes ................................................................................................................................. 229

Table 190 — Production State Awareness Enablement ............................................................................................ 230

Table 191 — Secure Removal Type .......................................................................................................................... 231

Table 192 — Command Queue Mode Enable ........................................................................................................... 231

Table 193 — SECURE_WP_MODE_ENABLE ....................................................................................................... 232

Table 194 — SECURE _WP_MODE_CONFIG ...................................................................................................... 233

Table 195 — Error correction codes.......................................................................................................................... 234

Table 196 — DSR register content ............................................................................................................................ 243

Table 197 — General operating conditions ............................................................................................................... 245

Table 198 — e•MMC power supply voltage ............................................................................................................. 247

Table 199 — e•MMC voltage combinations ............................................................................................................. 247

Table 200 — Capacitance and Resistors ................................................................................................................... 248

Table 201 — AC Overshoot/Undershoot Specification ............................................................................................ 250

Table 202 — Open-drain bus signal level ................................................................................................................. 251

Table 203 — Push-pull signal level—high-voltage e•MMC ..................................................................................... 251

Table 204 — Push-pull signal level—1.70 V -1.95 V V

CCQ

voltage Range .............................................................. 251

Table 205 — Push-pull signal level—1.1 V-1.3 V V

CCQ

range e•MMC ................................................................... 251

Table 206 — I/O driver strength types ...................................................................................................................... 252

Table 207 — Driver Type-0 AC Characteristics ...................................................................................................... 253

Table 208 — High-speed Device interface timing .................................................................................................... 254

Table 209 — Backward-compatible Device interface timing.................................................................................... 255

Table 210 — High-speed dual rate interface timing .................................................................................................. 257

Table 211 — HS200 Clock signal timing .................................................................................................................. 258

Table 212 — HS200 Device input timing ................................................................................................................. 259

Table 213 — Output timing ....................................................................................................................................... 260

Table 214 — Temperature Conditions ...................................................................................................................... 261

Table 215 — HS400 Device input timing ................................................................................................................. 262

Table 216 — HS400 Device Output timing .............................................................................................................. 263

Table 217 — HS400 Capacitance and Resistors ....................................................................................................... 264

Table 218 — HS400 CMD Response timing ............................................................................................................ 265

Table 219 — e•MMC host requirements for Device classes ..................................................................................... 267

Table 220 — New Features List for device type ....................................................................................................... 268

Table A.221 — Macro commands ............................................................................................................................. 271

Table A.222 — Forward-compatible host interface timing ....................................................................................... 281

Table A.223 — Bus testing for eight data lines ......................................................................................................... 284