SAM4E芯片详解：高性能32位ARM Cortex-M4微控制器

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"SAM4E芯片管脚及功能原理详解文档" Atmel的SAM4E系列是基于高性能32位ARM Cortex-M4 RISC处理器的闪存微控制器，它集成了浮点单元（FPU）。这款芯片最高运行频率可达120MHz，并提供了最多1024KB的闪存、2KB的缓存内存以及高达128KB的SRAM，为高效处理和存储提供了充足的空间。 SAM4E的一大亮点在于其丰富的高级连接性外设。包括支持10/100Mbps Ethernet MAC并兼容IEEE 1588的时间同步协议，以及双CAN接口，这使得该芯片在工业自动化、家庭和建筑控制、机器间通信、汽车后市场以及能源管理应用中表现出色。此外，它还具备一个全速USB设备端口，内置收发器，可满足高速数据传输需求。 SAM4E还配备了高速MCI接口，支持SDIO/SD/MMC卡，能够连接外部总线接口，该接口带有静态内存控制器，可以连接SRAM、PSRAM、NOR Flash、LCD模块和NAND Flash，增强了系统扩展性。为了适应图像处理，芯片还包含了并行I/O捕获模式，用于摄像头接口。硬件加速的AES256加密功能确保了数据安全，而两个USART则为串行通信提供了强大的支持。此外，SAM4E还包括其他关键功能，如通用定时器、PWM单元、模拟比较器、ADC和DAC等，这些都为实现各种复杂的实时控制和信号处理任务提供了可能。其内建的调试接口（如JTAG和SWD）使得开发和调试过程更加便捷。这些特性使得SAM4E成为需要高性能计算、实时控制和网络连接能力的嵌入式应用的理想选择。 SAM4E芯片凭借其强大的处理能力、丰富的外设接口和高度集成的特性，成为了各种复杂应用领域中的首选微控制器。无论是在工业控制系统还是在智能家居设备中，都能看到其身影，体现了ARM Cortex-M4架构的优越性能和灵活性。

SAM4E [DATASHEET]

11157C–ATARM–25-Jul-13

Figure 5-2. Core Externally Supplied

Note: Restrictions:

- For USB, VDDIO needs to be greater than 3.0V.

- For AFE, VDDIN needs to be greater than 2.0V

- For DAC, VDDIN needs to be greater than 2.4V

5.4 Active Mode

Active mode is the normal running mode with the core clock running from the fast RC oscillator, the main crystal oscillator

or the PLLA. The power management controller can be used to adapt the frequency and to disable the peripheral clocks.

5.5 Low-power Modes

The SAM4E has the following low-power modes: backup mode, wait mode and sleep mode.

Note: The Wait For Event instruction (WFE) of the Cortex-M4 core can be used to enter any of the low-power modes, how-

ever, this may add complexity in the design of application state machines. This is due to the fact that the WFE

instruction goes along with an event flag of the Cortex core (cannot be managed by the software application). The

event flag can be set by interrupts, a debug event or an event signal from another processor. Since it is possible for an

interrupt to occur just before the execution of WFE, WFE takes into account events that happened in the past. As a

result, WFE prevents the device from entering wait mode if an interrupt event has occurred.

Atmel has made provision to avoid using the WFE instruction. The workarounds to ease application design are as fol-

lows:

- For backup mode, switch off the voltage regulator and configure the VROFF bit in the Supply Controller Control Reg-

ister (SUPC_CR).

- For wait mode, configure the WAITMODE bit in the PMC Clock Generator Main Oscillator Register of the Power Man-

agement Controller (PMC)

- For sleep mode, use the Wait For Interrupt (WFI) instruction.

Complete information is available in Table 5-1 “Low-power Mode Configuration Summary” .

5.5.1 Backup Mode

The purpose of backup mode is to achieve the lowest power consumption possible in a system which is performing

periodic wake-ups to perform tasks but not requiring fast startup time. Total current consumption is 1 μA typical (VDDIO

= 1.8 V to 25°).

The Supply Controller, zero-power power-on reset, RTT, RTC, backup registers and 32 kHz oscillator (RC or crystal

oscillator selected by software in the Supply Controller) are running. The regulator and the core supply are off.

The SAM4E can be awakened from this mode using the WKUP0-15 pins, the supply monitor (SM), the RTT or RTC

wake-up event.

Backup mode is entered by writing a 1 to the VROFF bit of the Supply Controller Control register (SUPC_CR) (A key is

needed to write the VROFF bit, refer to the Supply Controller SUPC section of the product datasheet) and with the

Main Supply

(1.62V-3.6V)

Canbethe

same supply

VDDCORE Supply

(1.08V-1.32V)

ADC, DAC, Analog

Comparator Supply

(2.0V-3.6V)

ADC, DAC

Analog Comp.

USB

Transceivers

VDDIN

Voltage

Regulator

VDDOUT

VDDCORE

VDDIO

VDDPLL

SAM4E [DATASHEET]

11157C–ATARM–25-Jul-13

SLEEPDEEP bit in the Cortex-M4 System Control register set to 1. (See the power management description in the ARM

Cortex-M4 Processor section of the product datasheet).

To enter backup mode using the VROFF bit:

 Write a 1 to the VROFF bit of SUPC_CR.

To enter backup mode using the WFE instruction:

 Write a 1 to the SLEEPDEEP bit of the Cortex-M4 processor.

 Execute the WFE instruction of the processor.

In both cases, exit from backup mode happens if one of the following enable wake up events occurs:

 WKUPEN0-15 pins (level transition, configurable debouncing)

 Supply Monitor alarm

 RTC alarm

 RTT alarm

5.5.2 Wait Mode

The purpose of wait mode is to achieve very low power consumption while maintaining the whole device in a powered

state for a startup time of less than 10 μs. Current consumption in wait mode is typically 32 μA (total current

consumption) if the internal voltage regulator is used.

In this mode, the clocks of the core, peripherals and memories are stopped. However, the core, peripherals and

memories power supplies are still powered. From this mode, a fast start up is available.

This mode is entered by setting the WAITMODE bit to 1 in the CKGR_MOR register in conjunction with FLPM = 0 or

FLPM = 1 bits of the PMC_FSMR register or by the WFE instruction.

The Cortex-M4 is able to handle external or internal events in order to wake-up the core. This is done by configuring the

external lines WUP0-15 as fast startup wake-up pins (refer to Section 5.7 “Fast Start-up”). RTC or RTT Alarm and USB

wake-up events can be used to wake up the CPU.

To enter wait mode with WAITMODE bit:

 Select the 4/8/12 MHz fast RC oscillator as Main Clock.

 Set the FLPM field in the PMC Fast Startup Mode Register (PMC_FSMR).

 Set Flash Wait State at 0.

 Set the WAITMODE bit = 1 in PMC Main Oscillator Register (CKGR_MOR).

 Wait for Master Clock Ready MCKRDY = 1 in the PMC Status Register (PMC_SR).

To enter wait mode with WFE:

 Select the 4/8/12 MHz fast RC oscillator as Main Clock.

 Set the FLPM field in the PMC Fast Startup Mode Register (PMC_FSMR).

 Set Flash Wait State at 0.

 Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR).

 Execute the Wait-For-Event (WFE) instruction of the processor.

In both cases, depending on the value of the field Flash Low Power Mode (FLPM), the Flash enters three different

modes:

 FLPM = 0 in Standby mode (Low consumption)

 FLPM = 1 in Deep power-down mode (Extra low consumption)

 FLPM = 2 in Idle mode. Memory ready for Read access

Table 5-1 summarizes the power consumption, wake-up time and system state in wait mode.

SAM4E [DATASHEET]

11157C–ATARM–25-Jul-13

5.5.3 Sleep Mode

The purpose of sleep mode is to optimize power consumption of the device versus response time. In this mode, only the

core clock is stopped. The peripheral clocks can be enabled. The current consumption in this mode is application

dependent.

This mode is entered via WFI or WFE instructions.

The processor can be awakened from an interrupt if the WFI instruction of the Cortex-M4 is used or from an event if the

WFE instruction is used.

5.5.4 Low-power Mode Summary Table

The modes detailed above are the main low-power modes. Each part can be set to on or off separately and wake-up

sources can be individually configured. Table 5-1 below provides the configuration summary of the low-power modes.

Notes: 1.

When considering wake-up time, the time required to start the PLL is not taken into account. Once started, the device works with the 4/8/12

MHz fast RC oscillator. The user has to add the PLL start-up time if it is needed in the system. The wake-up time is defined as the time

taken for wake up until the first instruction is fetched.

2. The external loads on PIOs are not taken into account in the calculation.

3. Supply Monitor current consumption is not included.

4. Total consumption 1μA typ to 1.8V on VDDIO to 25°.

5. Power consumption on VDDCORE. For total current consumption, please refer to the “Electrical Characteristics” section of this datasheet.

6. Depends on MCK frequency.

7. In this mode the core is supplied and not clocked but some peripherals can be clocked.

Table 5-1. Low-power Mode Configuration Summary

Mode

SUPC,

32 kHz

Oscillator,

RTC, RTT

Backup

Registers,

POR

(Backup

Region) Regulator

Core

Memory

Peripherals Mode Entry

Potential Wake-Up

Sources

Core at

Wake-Up

PIO State

while in Low-

Power Mode

PIO State at

Wake Up

Consumption

(2) (3)

Wake-up

Time

(1)

Backup

Mode

ON OFF

OFF

(Not powered)

VROFF = 1

WFE +

SLEEPDEEP = 1

WUP0-15 pins

SM alarm

RTC alarm

RTT alarm

Reset

state saved

PIOA & PIOB

& PIOC&

PIOD &

PIOE

Inputs with

pull-ups

1 μA typ

(4)

< 1 ms

Wait Mode

w/Flash in

Standby

Mode

ON ON

Powered

(Not clocked)

WAITMODE = 1 +

FLPM = 0

WFE +

SLEEPDEEP = 0

+ LPM = 1 + FLPM

= 0

Any Event from:

Fast startup through

WUP0-15

RTC alarm

RTT alarm

USB wake-up

Clocked

back

state saved

Unchanged 56 μA

(5)

10 us

Wait Mode

w/Flash in

Deep

Power-

down Mode

ON ON

Powered

(Not clocked)

WAITMODE = 1 +

FLPM = 1

WFE +

SLEEPDEEP = 0

+ LPM = 1 + FLPM

= 1

Any Event from:

Fast startup through

WUP0-15

RTC alarm

RTT alarm

USB wake-up

Clocked

back

state saved

Unchanged 46.6 μA < 100 us

Sleep Mode ON ON

Powered

(7)

ot clocked)

WFE

WFI +

SLEEPDEEP = 0

+ LPM = 0

Entry mode =WFI

Interrupt Only;

Entry mode =WFE

Any Enabled

Interrupt and/or Any

Event from:

Fast start-up through

WUP0-15

RTC alarm

RTT alarm

USB wake-up

Clocked

back

state saved

Unchanged

(6) (6)

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SAM4E芯片详解：高性能32位ARM Cortex-M4微控制器

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