Sensors
and
Actuators
A
211
(2014)
60–66
Contents
lists
available
at
ScienceDirect
Sensors
and
Actuators
A:
Physical
j
ourna
l
ho
me
page:
www.elsevier.com/locate/sna
A
novel
CMOS
Hall
effect
sensor
D.S.
Mellet
a,
∗
,
M.
du
Plessis
b
a
Azoteq
Pty(Ltd),
109
Main
Street,
7646
Paarl,
South
Africa
b
University
of
Pretoria,
Carl
and
Emily
Fuchs
Institute
for
Microelectronics,
0002
Pretoria,
South
Africa
a
r
t
i
c
l
e
i
n
f
o
Article
history:
Received
8
October
2013
Received
in
revised
form
18
February
2014
Accepted
18
February
2014
Available
online
12
March
2014
Keywords:
Hall
effect
CMOS
Hall
current
a
b
s
t
r
a
c
t
This
paper
reports
on
a
new
technique
for
sensing
the
Hall
effect
in
an
integrated
CMOS
device.
Contrary
to
traditional
Hall
plates
where
sensor
contacts
comprise
of
highly
doped,
low
ohmic
contacts,
the
proposed
sensor
makes
use
of
a
parasitic
vertical
pnp
bipolar
junction
transistor
(BJT)
to
sense
and
amplify
the
Hall
current
caused
by
the
Lorentz
force
in
the
presence
of
a
perpendicular
magnetic
field.
The
Hall
effect
appears
as
a
current
through
the
emitter
of
the
BJT.
The
BJT
forward
gain
implies
a
direct
gain
of
at
least
ˇ
+
1
in
the
measured
signal
in
comparison
to
traditional
methods.
©
2014
Elsevier
B.V.
All
rights
reserved.
1.
Introduction
The
state
of
the
art
method
of
sensing
the
Hall
effect
in
Hall
plate
devices
is
through
the
use
of
highly
doped
low
ohmic
con-
tacts
[1–8].
This
method
of
sensing
is
primarily
associated
with
the
Hall
voltage
which
in
silicon
can
be
very
limited
in
magnitude.
A
typical
silicon
Hall
plate
has
a
sensitivity
of
0.07
T
−1
for
both
voltage
mode
and
current
mode
of
operation
[9],
and
since
the
Hall
volt-
age
scales
linearly
with
the
applied
DC
voltage
bias
and
magnetic
field,
this
relates
to
a
typical
signal
in
the
order
of
25
mV
at
a
DC
bias
of
1.7
V
and
a
magnetic
field
of
200
mT.
Taking
the
geometrical
factor
into
account
for
a
square
plate,
this
signal
can
diminish
fur-
ther
by
up
to
30%
in
magnitude
[9].
Replacing
the
n+
sense
contacts
in
the
n-well
with
p-type
implants
results
in
a
parasitic
pnp
BJT
formed
vertically
downward
to
the
substrate
through
which
the
Hall
current
can
be
effectively
measured,
very
similar
to
the
BJTs
used
in
a
CMOS
bandgap
circuit
[10].
This
allows
for
a
very
simple
measuring
technique
with
built-in
gain
when
compared
to
com-
plex
traditional
amplification
such
as
instrumentation
amplifiers.
As
CMOS
technologies
scale
down
to
smaller
geometries,
combined
with
the
high
biasing
voltages
and
currents
required
to
maximize
Hall
sensitivities,
traditional
Hall
plates
are
progressing
toward
the
velocity
saturation
limits
and
increased
Joule
heating.
For
large
geometries
this
is
normally
no
problem
but
for
-Hall
devices
this
becomes
a
limiting
factor
[11].
For
silicon
velocity
saturation
occurs
at
approximately
30
kV
cm
−1
and
this
corresponds
to
a
minimum
∗
Corresponding
author.
Tel.:
+27
21
863
0033.
E-mail
addresses:
dieter.mellet@azoteq.com,
dmellet@gmail.com
(D.S.
Mellet).
length
of
1.5
m
for
a
voltage
bias
of
5
V
[9].
In
contrast
with
tradi-
tional
sensing
techniques
which
require
high
supply
voltages,
the
technique
is
capable
of
attaining
a
wide
dynamic
range
at
very
low
supply
voltages
and
hence
can
be
applied
in
low
power
devices.
Our
novel
sensing
circuit
will
induce
substrate
currents
through
the
collector
terminals
of
the
vertical
pnp
BJTs
and
may
require
well-known
layout
techniques
to
avoid
undesired
latch
up
effects.
Transistor
mismatches,
especially
pnp
transistor
beta
mismatches
on
chip,
may
require
DC
offset
trimming
techniques
similar
to
that
used
in
operational
amplifier
input
stage
designs.
This
paper
begins
with
a
brief
summary
of
the
Hall
effect
physics
applicable
to
the
proposed
design
after
which
the
Hall
plate
design,
layout,
experimental
procedure
and
results
are
explained.
The
effect
of
noise
and
other
limitations
are
then
discussed
followed
by
the
concluding
remarks
and
suggestions
for
further
research
on
the
topic.
2.
The
Hall
effect
2.1.
Hall
voltage
in
long
and
short
geometries
Fig.
1
illustrates
a
typical
(a)
long
and
(b)
short
Hall
plate
with
dimensions
length
=
l,
width
=
w
and
thickness
=
t
and
four
contacts
at
its
boundaries,
with
l
w
for
the
long
device
and
l
w
for
the
short
device.
The
long
geometry
in
(a)
is
very
similar
to
the
2
×
9
cm
sample
used
by
Hall
in
his
original
experiment
[12].
The
Hall
voltage
and
current
deflection
illustrated
in
Fig.
1
is
a
direct
result
of
the
Lorentz
force.
A
Hall
voltage
occurs
due
to
the
boundaries
of
the
long
sample
constraining
the
current
flow
down
the
length
while
in
the
short
sample
current
deflection
occurs
as
http://dx.doi.org/10.1016/j.sna.2014.02.026
0924-4247/©
2014
Elsevier
B.V.
All
rights
reserved.