微软DirectX VA：视频加速API接口定义

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"DXVA DOC微软文档是微软提供的一份关于DirectX Video Acceleration (DXVA)的详细技术文档，主要定义了解析器接口，以供应用程序与解码器进行交互，实现硬件加速数字视频解码处理。文档特别强调了对MPEG-2 'main profile' 视频的支持，并且设计目标也包括其他关键视频编码格式，如H.263、H.261、MPEG-1和MPEG-4。" DXVA（DirectX Video Acceleration）是微软开发的一个API和设备驱动接口，其核心目的是优化数字视频解码的性能，通过利用GPU的计算能力来减轻CPU的负载，特别是在处理高清视频和复杂视频编码时。DXVA 1.01版本是这个文档讨论的内容，发布于2001年，由微软的Gary Sullivan和Chad Fogg共同编写。文档中详细描述了如何设计硬件以适应微软Windows家族操作系统，特别是对于DirectX环境下的视频加速。它提供的接口不仅限于MPEG-2，还考虑到了其他重要的视频编码标准，如H.263和H.261，这些都是在互联网和多媒体应用中广泛使用的编码格式。此外，DXVA还支持alpha混合功能，这对于处理如DVD字幕等需要透明度效果的应用场景尤为重要。 DXVA的API和DDI设计允许应用程序与硬件解码器进行有效通信，确保视频数据能正确、高效地被硬件处理。这种接口定义使得开发者能够利用硬件加速的优势，实现更流畅、更节能的视频播放体验。文档中的免责声明指出，虽然提供了当前微软对这些问题的看法，但内容可能会随市场变化而更新，因此不应被视为微软的正式承诺。微软无法保证信息的绝对准确，因为技术发展和市场需求会持续演变。 DXVA DOC微软文档是理解并开发支持DXVA的软件或硬件的关键参考资料，它为开发者提供了一个框架，以便他们能够充分利用现代图形处理器的能力，提升视频解码的效率和质量。

Microsoft DirectX VA: Video Acceleration API/DDI — 8

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reference block – block area extracted from reference frame buffer.

prediction block – block filtered from reference block.

prediction plane – array of samples formed prior to combining of macroblock

prediction. Each plane represents a set of prediction blocks, usually collected from one

frame location. Planes are combined to form a single macroblock prediction.

Prediction macroblock – macroblock prediction including all color channels

component – one of three color channels {Y, Cb, Cr }.

Host CPU – programmable processor which controls overall function of video decode

(high level operations).

Accelerator – functional unit which executes simple but high rate operations such as

IDCT, MCP, display format conversion.

motion vector arithmetic – operations which convert motion vectors to prediction

block addresses.

prediction address – location of the prediction block within an implementation-

specific design.

composite prediction block – prediction block whose attributes apply to both

luminance and chrominance.

component prediction block – prediction block whose attributes apply to either

luminance or chrominance.

intra – representation of picture content without prediction using any previously-

decoded picture as a reference.

inter – representation of picture content by first encoding a prediction of an area of the

picture using some previously-decoded picture and then optionally adding a signal

representing the deviation from that prediction.

residual difference decoding – decoding of the waveform which represents the error

signal which has been encoded to represent whatever signal remains after motion-

compensated prediction as appropriate. This may entail simply an “intra”

representation of a non-predicted waveform or an “inter” difference after prediction.

ReservedBits – Any field in this specification having the name ReservedBits as its

name or part of its name is not presently used in this specification and shall have the

value zero.

should – used to describe encouraged (but not required) behavior.

shall – used to describe required behavior.

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Microsoft DirectX VA: Video Acceleration API/DDI — 10

The three video component channels {Y, Cb, Cr} are accessed by interfaces defined in

this specification. Motion vectors for the two chrominance components are derived

from those sent for luminance components. Conversion of these motion vectors to

different coordinate systems is a responsibility of the Accelerator.

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Host CPU

MCP IDCT

video data buffer(s)

system data

buffers

frame buffers

Accelerator

Host

subpic

decode

Figure 3 -- Host and Accelerator System

The basic operations of H.261, MPEG-1, MPEG-2 (H.262), H.263, and MPEG-4 are

listed in chronological order below with a brief description of how they can be realized

using this specification.

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Formally titled “Video Codec for Audiovisual Services at px64 kbit/s,” ITU-T

Recommendation H.261 was the first digital video coding standard to deliver a

practical design with relatively high compression (the first digital video coding

standard, H.120, is largely forgotten today), and it contains the same basic design to be

later used in the other video codec standards, using 8-bit samples with Y, Cb, and Cr

components, 4:2:0 sampling, 16×16 “macroblock”-based motion compensation, 8×8

IDCT, zig-zag inverse scanning of coefficients, scalar quantization, and variable-length

coding of coefficients based on a combination of zero-valued run-lengths and

quantization index values. All H.261 prediction blocks use forward-only prediction

from the previous picture. H.261 does not have half-sample accurate prediction filters,

but instead uses a type of low-pass filter called the “loop filter” (Section 3.2.3 of the

H.261 specification) which can be turned off or on during motion compensation

prediction for each macroblock.

Annex D Graphics: H.261 later included an interesting trick mode called “Annex D

Graphic Transfer.” No special support is provided for this feature in this accelerator

interface. This feature can be supported using this specification by reading four

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微软DirectX VA：视频加速API接口定义

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