SJA1000 CAN通信头文件定义与寄存器详解

#ifndef _CANCOM_H
#define _CANCOM_H
#define CS1_SJA1000  0x7f00       //SJA1000 Pin /CS ----> P2.7,low level active
   
#define MOD_CAN1  XBYTE[CS1_SJA1000+0]   //Peli
#define CMR_CAN1  XBYTE[CS1_SJA1000+1]  //command
#define SR_CAN1   XBYTE[CS1_SJA1000+2]   //state
#define IR_CAN1   XBYTE[CS1_SJA1000+3]   //interrupt
#define IER_CAN1  XBYTE[CS1_SJA1000+4]  //interrupt enable  //Peli
#define BTR0_CAN1  XBYTE[CS1_SJA1000+6]        //bus timing0
#define BTR1_CAN1  XBYTE[CS1_SJA1000+7]        //bus timing1
#define OCR_CAN1  XBYTE[CS1_SJA1000+8]
#define TEST_CAN1  XBYTE[CS1_SJA1000+9]
#define ECC_CAN1  XBYTE[CS1_SJA1000+12]  //error catch
#define EWLR_CAN1  XBYTE[CS1_SJA1000+13]  //error warning limit
#define RXERR_CAN1  XBYTE[CS1_SJA1000+14]  //
#define TXERR_CAN1  XBYTE[CS1_SJA1000+15]
#define ACR0_CAN1  XBYTE[CS1_SJA1000+16]
#define ACR1_CAN1  XBYTE[CS1_SJA1000+17]
#define ACR2_CAN1  XBYTE[CS1_SJA1000+18]
#define ACR3_CAN1  XBYTE[CS1_SJA1000+19]
#define AMR0_CAN1  XBYTE[CS1_SJA1000+20]
#define AMR1_CAN1  XBYTE[CS1_SJA1000+21]
#define AMR2_CAN1  XBYTE[CS1_SJA1000+22]
#define AMR3_CAN1  XBYTE[CS1_SJA1000+23]
#define RBSA_CAN1  XBYTE[CS1_SJA1000+30]  //beginning of receive
#define CDR_CAN1  XBYTE[CS1_SJA1000+31]  //clock devide
#define TXFrameInfo1  XBYTE[CS1_SJA1000+16]  
#define TXID1    XBYTE[CS1_SJA1000+17]  
#define TXID2    XBYTE[CS1_SJA1000+18]