ARM架构参考手册:最新修订与商标说明

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ARM Architecture Reference Manual 是一份权威的文档,详细介绍了ARM架构的相关知识,由ARM Limited在1996年至2000年期间发布并保留所有版权。这份手册涵盖了ARM体系结构的各个方面,包括但不限于处理器设计、指令集、寄存器组、内存管理以及知识产权声明等内容。 该手册的核心部分着重于ARM(Advanced RISC Machines)架构,这是一种精简指令集计算机(RISC)架构,旨在提供高效能与低功耗。它包含了一种名为Thumb的嵌入式指令集,为低功耗应用提供了额外的优化。手册中还提到了一些ARM系列处理器,如ARM7TDMI、ARM9TDMI等,这些处理器被广泛应用于移动设备、嵌入式系统和服务器市场。 "ARM Architecture Reference Manual" 提供了关于ARM DDI0100E版本的更新信息,列出了文档中所做的一些修改。这表明该手册是基于不断演进的技术进行维护和改进的,反映了最新的ARM技术发展。在版权方面,ARM Limited强调了其商标权,如ARM、Thumb、StrongARM等,同时指出其他提及的产品或服务可能属于各自的版权所有者。 值得注意的是,手册中的内容未经ARM Limited事先书面许可,不得擅自复制或适应任何形式。此外,尽管手册以良好的信仰提供了产品细节和使用信息,但应意识到产品的具体规格和用法可能会随着技术的进步而发生变化,因此用户在使用时应考虑这些潜在的变动。 ARM Architecture Reference Manual是一份深入理解ARM处理器架构及其应用的关键资源,对于软件开发者、硬件工程师以及研究ARM技术的人来说,它是不可或缺的学习和参考工具。通过阅读和学习这份手册,用户可以了解到ARM体系结构的底层工作原理,以及如何优化代码以充分利用其性能优势。
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This manual describes the ARM® architecture v8, ARMv8. The architecture describes the operation of an ARMv8-A Processing element (PE), and this manual includes descriptions of: • The two Execution states, AArch64 and AArch32. • The instruction sets: — In AArch32 state, the A32 and T32 instruction sets, that are compatible with earlier versions of the ARM architecture. — In AArch64 state, the A64 instruction set. • The states that determine how a PE operates, including the current Exception level and Security state, and in AArch32 state the PE mode. • The Exception model. • The interprocessing model, that supports transitioning between AArch64 state and AArch32 state. • The memory model, that defines memory ordering and memory management. This manual covers a single architecture profile, ARMv8-A, that defines a Virtual Memory System Architecture (VMSA). • The programmers’ model, and its interfaces to System registers that control most PE and memory system features, and provide status information. • The Advanced SIMD and floating-point instructions, that provide high-performance: — Single-precision and double-precision floating-point operations. — Conversions between double-precision, single-precision, and half-precision floating-point values. — Integer, single-precision floating-point, and in A64, double-precision vector operations in all instruction sets. — Double-precision floating-point vector operations in the A64 instruction set. • The security model, that provides two security states to support secure applications. • The virtualization model, that support the virtualization of Non-secure operation. • The Debug architecture, that provides software access to debug features.