TLV2548芯片技术规格与应用
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"tlv2548芯片手册"
TLV2548是一款高性能的模数转换器（ADC），由美国德州仪器（Texas Instruments）生产。这款芯片在多个方面展现了其出色的功能和特性，适用于各种高精度数据采集系统，如音频、测量和通信应用。
1. **最大吞吐量200-KSPS**：
TLV2548能够以高达200千样本每秒（KSPS）的速度进行采样，这使得它在需要快速数据转换的系统中非常适用。
2. **内置参考、转换时钟和8×FIFO**：
内置的参考电压源简化了外部电路设计，转换时钟则提供了精确的采样控制。8级先进先出（FIFO）缓冲区可以有效处理数据传输，确保与微处理器或数字信号处理器（DSP）的高效接口。
3. **非线性误差**：
差分/积分非线性误差（DNL/INL）为±1 LSB，这意味着在转换过程中，输出数据的精度非常高，误差极小。
4. **信噪比和失真比**：
在12-kHz的频率下，TLV2548的信噪比（SNR）达到70分贝，失真比（THD+N）也相当低，这保证了高质量的信号处理能力。
5. **无杂散动态范围**：
在同样12-kHz的频率下，其无杂散动态范围（SFDR）达到75分贝，表明在高频率范围内，信号的纯净度和分辨率表现良好。
6. **SPI兼容串行接口**：
该芯片支持SPI接口（CPOL=0, CPHA=0），最高可配置到20-MHz的时钟频率，与各种微控制器和数字信号处理器无缝对接。
7. **单一宽范围电源供应**：
TLV2548工作在2.7V至5.5V的电源电压下，这使其能够在多种电源条件下稳定工作。
8. **模拟输入范围**：
模拟输入范围从0伏到电源电压，并具有500kHz的带宽，适应广泛的信号类型和幅度。
9. **硬件控制和可编程采样周期**：
用户可以通过硬件或软件方式调整采样周期，以适应不同的应用需求。
10. **低功耗运行**：
在3.3V时，操作电流仅为1.0mA，5.5V时为1.1mA（外接参考电压）。此外，还提供了两种节能模式：软件/硬件控制的电源下降模式和自动电源下降模式，这两种模式在待机时将电流降至1μA以下。
11. **可编程自动通道扫描**：
这个功能允许用户设定芯片自动地依次转换多个输入通道，提高了多通道应用的效率。
12. **引脚配置**：
TLV2548的封装包括SDO（串行数据输出）、SDI（串行数据输入）、SCLK（串行时钟）、EOC/(INT)（转换结束/中断）、VCC（电源）、A0至A7（地址输入）、CS（片选）、REFP和REFM（参考电压输入）、FS（帧同步）、PWDN（电源下降）、GND（接地）、CSTART（开始转换）、A5至A7（地址输入）以及DWORPW（封装类型）等。
TLV2548是一款集成了高精度、高速度、低功耗和灵活接口的ADC，适用于需要高分辨率和低噪声性能的系统设计。
SLAS198E − FEBRUARY 1999 − REVISED JUNE 2003
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2544/TLV2548 conversion modes
The TLV2544 and TLV2548 have four different conversion modes (mode 00, 01, 10, 11). The operation of each
mode is slightly different, depending on how the converter performs the sampling and which host interface is
used. The trigger for a conversion can be an active CSTART
(extended sampling), CS (normal sampling, SPI
interface), or FS (normal sampling, TMS320 DSP interface). When FS is used as the trigger, CS
can be held
active, i.e. CS
does not need to be toggled through the trigger sequence. SDI can be one of the channel select
commands, such as SELECT CHANNEL 0. Different types of triggers should not be mixed throughout the repeat
and sweep operations. When CSTART
is used as the trigger, the conversion starts on the rising edge of
CSTART
. The minimum low time for CSTART is equal to t
(SAMPLE)
. If an active CS or FS is used as the trigger,
the conversion is started after the 16th or 28th SCLK edge. Enough time (for conversion) should be allowed
between consecutive triggers so that no conversion is terminated prematurely.
one shot mode (mode 00)
One shot mode (mode 00) does not use the FIFO, and the EOC is generated as the conversion is in progress
(or INT is generated after the conversion is done).
repeat mode (mode 01)
Repeat mode (mode 01) uses the FIFO. This mode setup requires configuration cycle and channel select cycle.
Once the programmed FIFO threshold is reached, the FIFO must be read, or the data is lost when the sequence
starts over again with the SELECT cycle and series of triggers. No configuration is required except for
reselecting the channel unless the operation mode is changed. This allows the host to set up the converter and
continue monitoring a fixed input and come back to get a set of samples when preferred.
Triggered by CSTART
: The first conversion can be started with a select cycle or CSTART. To do so, the user
can issue CSTART
during the select cycle, immediately after the four-bit channel select command. The first
sample started as soon as the select cycle is finished (i.e., CS
returns to 1). If there is enough time (2 µs) left
between the SELECT cycle and the following CSTART
, a conversion is carried out. In this case, you need one
less trigger to fill the FIFO. Succeeding samples are triggered by CSTART
.
sweep mode (mode 10)
Sweep mode (mode 10) also uses the FIFO. Once it is programmed in this mode, all of the channels listed in
the selected sweep sequence are visited in sequence. The results are converted and stored in the FIFO. This
sweep sequence may not be completed if the FIFO threshold is reached before the list is completed. This allows
the system designer to change the sweep sequence length. Once the FIFO has reached its programmed
threshold, an interrupt (INT
) is generated. The host must issue a read FIFO command to read and clear the FIFO
before the next sweep can start.
repeat sweep mode (mode 11)
Repeat sweep mode (mode 11) works the same way as mode 10 except the operation has an option to continue
even if the FIFO threshold is reached. Once the FIFO has reached its programmed threshold, an interrupt (INT)
is generated. Then two things may happen:
1. The host may choose to act on it (read the FIFO) or ignore it. If the next cycle is a read FIFO cycle, all of
the data stored in the FIFO is retained until it has been read in order.
2. If the next cycle is not a read FIFO cycle, or another CSTART
is generated, all of the content stored in the
FIFO is cleared before the next conversion result is stored in the FIFO, and the sweep is continued.
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