英特尔80386程序员参考手册：i386技术详解

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"英特尔80386程序员参考手册(i386)是Intel公司在1986年发布的一份技术文档，旨在为开发者提供关于80386微处理器的详细编程指南。该手册包含了处理器的架构、指令集、内存管理和中断处理等多个方面的内容。Intel明确表示，手册中的信息可能存在错误，且不承诺更新，用户在使用时应谨慎对待。此外，手册也提醒读者在下单购买产品前应向当地销售办公室获取最新的规格信息。手册还列举了一些Intel的商标，显示了Intel在当时的产品线和品牌策略。" 80386处理器是Intel推出的一款32位微处理器，它是x86架构的重要里程碑，为后来的个人计算机发展奠定了基础。以下是对80386的一些关键知识点的详细解释： 1. **32位架构**：80386引入了32位数据总线和地址总线，这意味着它可以处理更大量的数据，并支持高达4GB的内存寻址。 2. **指令集**：80386扩展了80286的指令集，增加了新的32位指令，包括浮点运算、段间间接寻址、保护模式下的内存管理等，提供了更强的计算能力。 3. **保护模式**：80386引入了先进的保护模式，允许多任务和多用户环境，每个任务或进程有自己的地址空间，增强了系统的安全性和稳定性。 4. **分页机制**：80386实现了硬件级别的分页，通过页表进行内存管理，允许虚拟地址到物理地址的映射，提高了内存的利用率和效率。 5. **多任务处理**：处理器支持同时执行多个任务，通过任务切换实现并发执行，提升了系统效率。 6. **FPU（浮点处理器）**：内置的浮点处理器使得80386在科学计算和图形处理方面有了显著提升。 7. **中断处理**：80386改进了中断处理机制，支持硬件和软件中断，提供了中断向量表和中断描述符表，增强了系统的响应能力和实时性。 8. **汇编语言编程**：对于程序员来说，理解80386的指令集和寻址模式是编写高效汇编代码的关键，手册会详细介绍这些内容。 9. **扩展内存模型**：如HMA（高端内存区）和LIMM（扩展内存模型），使得80386能够利用超过1MB的内存。 10. **系统设计**：手册也会涵盖如何设计和配置80386系统，包括BIOS、中断服务、设备驱动等方面的指导。 "英特尔80386程序员参考手册(i386)intel.pdf"是开发者理解和利用80386处理器进行系统设计和软件开发的重要参考资料，涵盖了从底层硬件到高级软件接口的全面知识。这份手册对于理解早期个人计算机的发展历程以及现代x86架构的基础具有极高的历史和技术价值。

INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986

Page 16 of 421

1. Protected Mode.

2. Real-Address Mode.

3. Virtual 8086 Mode.

Protected mode is the natural 32-bit environment of the 80386 processor. In

this mode all instructions and features are available.

Real-address mode (often called just "real mode") is the mode of the

processor immediately after RESET. In real mode the 80386 appears to

programmers as a fast 8086 with some new instructions. Most applications of

the 80386 will use real mode for initialization only.

Virtual 8086 mode (also called V86 mode) is a dynamic mode in the sense

that the processor can switch repeatedly and rapidly between V86 mode and

protected mode. The CPU enters V86 mode from protected mode to execute an

8086 program, then leaves V86 mode and enters protected mode to continue

executing a native 80386 program.

The features that are available to applications programs in protected mode

and to all programs in V86 mode are the same. These features form the

content of Part I. The additional features that are available to systems

software in protected mode form Part II. Part III explains real-address

mode and V86 mode, as well as how to execute a mix of 32-bit and 16-bit

programs.

Available in All Modes Part I ── Applications Programming

Available in Protected Part II ── Systems Programming

Mode Only

Compatibility Modes Part III ── Compatibility

1.1.1 Part I ── Applications Programming

This part presents those aspects of the architecture that are customarily

used by applications programmers.

Chapter 2 ── Basic Programming Model: Introduces the models of memory

organization. Defines the data types. Presents the register set used by

applications. Introduces the stack. Explains string operations. Defines the

parts of an instruction. Explains addressing calculations. Introduces

interrupts and exceptions as they may apply to applications programming.

Chapter 3 ── Application Instruction Set: Surveys the instructions commonly

used for applications programming. Considers instructions in functionally

related groups; for example, string instructions are considered in one

section, while control-transfer instructions are considered in another.

Explains the concepts behind the instructions. Details of individual

instructions are deferred until Part IV, the instruction-set reference.

INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986

Page 17 of 421

1.1.2 Part II ── Systems Programming

This part presents those aspects of the architecture that are customarily

used by programmers who write operating systems, device drivers, debuggers,

and other software that supports applications programs in the protected mode

of the 80386.

Chapter 4 ── Systems Architecture: Surveys the features of the 80386 that

are used by systems programmers. Introduces the remaining registers and data

structures of the 80386 that were not discussed in Part I. Introduces the

systems-oriented instructions in the context of the registers and data

structures they support. Points to the chapter where each register, data

structure, and instruction is considered in more detail.

Chapter 5 ── Memory Management: Presents details of the data structures,

registers, and instructions that support virtual memory and the concepts of

segmentation and paging. Explains how systems designers can choose a model

of memory organization ranging from completely linear ("flat") to fully

paged and segmented.

Chapter 6 ── Protection: Expands on the memory management features of the

80386 to include protection as it applies to both segments and pages.

Explains the implementation of privilege rules, stack switching, pointer

validation, user and supervisor modes. Protection aspects of multitasking

are deferred until the following chapter.

Chapter 7 ── Multitasking: Explains how the hardware of the 80386 supports

multitasking with context-switching operations and intertask protection.

Chapter 8 ── Input/Output: Reveals the I/O features of the 80386, including

I/O instructions, protection as it relates to I/O, and the I/O permission

map.

Chapter 9 ── Exceptions and Interrupts: Explains the basic interrupt

mechanisms of the 80386. Shows how interrupts and exceptions relate to

protection. Discusses all possible exceptions, listing causes and including

information needed to handle and recover from the exception.

Chapter 10 ── Initialization: Defines the condition of the processor after

RESET or power-up. Explains how to set up registers, flags, and data

structures for either real-address mode or protected mode. Contains an

example of an initialization program.

Chapter 11 ── Coprocessing and Multiprocessing: Explains the instructions

and flags that support a numerics coprocessor and multiple CPUs with shared

memory.

Chapter 12 ── Debugging: Tells how to use the debugging registers of the

80386.

INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986

Page 18 of 421

1.1.3 Part III ── Compatibility

Other parts of the book treat the processor primarily as a 32-bit machine,

omitting for simplicity its facilities for 16-bit operations. Indeed, the

80386 is a 32-bit machine, but its design fully supports 16-bit operands and

addressing, too. This part completes the picture of the 80386 by explaining

the features of the architecture that support 16-bit programs and 16-bit

operations in 32-bit programs. All three processor modes are used to

execute 16-bit programs: protected mode can directly execute 16-bit 80286

protected mode programs, real mode executes 8086 programs and real-mode

80286 programs, and virtual 8086 mode executes 8086 programs in a

multitasking environment with other 80386 protected-mode programs. In

addition, 32-bit and 16-bit modules and individual 32-bit and 16-bit

operations can be mixed in protected mode.

Chapter 13 ── Executing 80286 Protected-Mode Code: In its protected mode,

the 80386 can execute complete 80286 protected-mode systems, because 80286

capabilities are a subset of 80386 capabilities.

Chapter 14 ── 80386 Real-Address Mode: Explains the real mode of the 80386

CPU. In this mode the 80386 appears as a fast real-mode 80286 or fast 8086

enhanced with additional instructions.

Chapter 15 ── Virtual 8086 Mode: The 80386 can switch rapidly between its

protected mode and V86 mode, giving it the ability to multiprogram 8086

programs along with "native mode" 32-bit programs.

Chapter 16 ── Mixing 16-Bit and 32-Bit Code: Even within a program or task,

the 80386 can mix 16-bit and 32-bit modules. Furthermore, any given module

can utilize both 16-bit and 32-bit operands and addresses.

1.1.4 Part IV ── Instruction Set

Parts I, II, and III present overviews of the instructions as they relate

to specific aspects of the architecture, but this part presents the

instructions in alphabetical order, providing the detail needed by

assembly-language programmers and programmers of debuggers, compilers,

operating systems, etc. Instruction descriptions include algorithmic

description of operation, effect of flag settings, effect on flag settings,

effect of operand- or address-size attributes, effect of processor modes,

and possible exceptions.

1.1.5 Appendices

The appendices present tables of encodings and other details in a format

designed for quick reference by assembly-language and systems programmers.

INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986

Page 20 of 421

● When loading a register, always load the undefined bits as zeros or

reload them with values previously stored from the same register.

────────────────────────────────────────────────────────────────────────────

NOTE

Depending upon the values of undefined register bits will make software

dependent upon the unspecified manner in which the 80386 handles these

bits. Depending upon undefined values risks making software incompatible

with future processors that define usages for these bits. AVOID ANY

SOFTWARE DEPENDENCE UPON THE STATE OF UNDEFINED 80386 REGISTER BITS.

Figure 1-1. Example Data Structure

GREATEST DATA STRUCTURE

ADDRESS

31 23 15 7 0 ◄──BIT

╔═══════════════╪═══════════════╪═══════════════╪═══════════════╗ OFFSET

║ ║28

╠═══════════════╪═══════════════╪═══════════════╪═══════════════╣

║ ║24

╠═══════════════╪═══════════════╪═══════════════╪═══════════════╣

║ ║20

╠═══════════════╪═══════════════╪═══════════════╪═══════════════╣

║ ║16

╠═══════════════╪═══════════════╪═══════════════╪═══════════════╣

║ ║12

╠═══════════════╪═══════════════╪═══════════════╪═══════════════╣

║ ║8

╠═══════════════╪═══════════════╪═══════════════╪═══════════════╣

║ UNDEFINED ║4

╠═══════════════╪═══════════════╪═══════════════╪═══════════════╣ SMALLEST

║ BYTE 3 BYTE 2 BYTE 1 BYTE 0 ║0 ADDRESS

╚═══════════════╪═══════════════╪═══════════════╪═══════════════╝▲

BYTE OFFSET───┘

1.3.3 Instruction Operands

When instructions are represented symbolically, a subset of the 80386

Assembly Language is used. In this subset, an instruction has the following

format:

label: prefix mnemonic argument1, argument2, argument3

where:

● A label is an identifier that is followed by a colon.

● A prefix is an optional reserved name for one of the instruction

prefixes.

● A mnemonic is a reserved name for a class of instruction opcodes that

have the same function.

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