JESD223E: UFSHCI 4.0 接口标准详解

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"JESD223E是JEDEC固态技术协会发布的一个标准，主要涉及Universal Flash Storage (UFS) Host Controller Interface的4.0版本。此标准旨在规范和提升UFS设备与主机之间的通信效率，促进互操作性和产品性能的改进，帮助购买者快速准确地选择适用的产品。JESD223E标准于2022年8月更新，是对2018年1月发布的JESD223D的修订版。" Universal Flash Storage (UFS) 是一种高速、低功耗的存储接口标准，广泛应用于移动设备如智能手机和平板电脑，以及一些高性能计算和嵌入式系统中。UFS 4.0标准在前一版本的基础上进行了多项改进和增强，以适应不断提升的存储需求和技术发展。首先，UFS 4.0可能引入了更高的数据传输速度。随着移动设备对数据处理速度的需求增加，新的标准可能提升了最大接口带宽，使得读写速度显著提高，从而缩短了文件传输和应用程序加载时间。此外，这也有助于支持高分辨率视频录制和播放，以及更复杂的应用程序运行。其次，UFS 4.0可能优化了能效管理。在移动设备中，电源效率至关重要。新版本的标准可能包含了更精细的电源管理策略，以减少待机和工作状态下的功耗，延长设备电池寿命。同时，智能电源管理可以确保在高速传输数据时保持低能耗，提高用户体验。再者，UFS 4.0可能增强了错误校验和容错能力。为了保证数据的完整性和可靠性，新标准可能采用了更强大的错误检测和纠正机制，比如增强型CRC（循环冗余校验）或前向纠错（FEC）技术，确保在恶劣环境或信号干扰下也能正确传输数据。此外，UFS 4.0标准可能还考虑了兼容性和互操作性问题。JEDEC的标准通常会定义一套通用的接口和协议，以确保不同厂商生产的UFS设备能够在同一主机系统上无缝运行。这有利于降低设备制造商和系统集成商的开发成本，同时也方便用户升级和更换存储设备。最后，JEDEC强调其标准并非针对专利权问题，不承担任何专利所有者的责任，也不对采用该标准的各方有任何义务。这意味着尽管标准的制定可能涉及到各种专利技术，但其目标是推动行业发展，而非解决专利纠纷。 JESD223E - Universal Flash Storage Host Controller Interface 4.0标准是UFS存储技术的一次重大升级，它在速度、能效、可靠性和互操作性等方面都做了显著提升，以满足现代移动设备和高速数据应用的不断增长的需求。

JEDEC Standard No. 223E

Page 8

4.3 Transfer Request Interface

A UFS Host System is composed of a number of hardware and software layers. Figure 3 illustrates a

conceptual block diagram of the building block layers in a host system.

Figure 3 — A conceptual block diagram of UFS host system

This standard defines a set of registers and data structures that work in concert with UFS host SW to

implement the four service access points (SAPs) as described in the Figure 3: UIO_SAP, UDM_SAP,

UTP_CMD_SAP and UTP_TM_SAP. Refer to [UFS], UFS Standard for the definition of the service

access points.

To manage the communication between host SW and the UFS devices attached, the host controller

provides three independent interfaces that host software uses to send a transfer request.

• UTP Transfer Request List. This list is used by host software to implement UTP_CMD_SAP and

UDM_SAP.

o UTP_CMD_SAP includes support for the following command types:

▪ All INCITS T10 draft standard functionality adopted by UFS.

▪ Native UFS command set.

o UDM_SAP includes support for the following command types:

▪ Device management function via QUERY REQUEST UPIU/QUERY RESPONSE UPIU and

NOP IN/NOP OUT UPIU.

The list consists of a data structure called UFS Transfer Request Descriptor (UTRD). UTRD describes a

command to be executed and the data associated it. UFS host SW issues a command to the host controller

by placing a UTRD on the List then rings the Host Controller doorbell for the list. Commands are

dispatched for execution by the UFSHCI in the order that they are placed on the List even though they

may be completed out of the order. The host controller acts on behalf of host processor to manage all the

data transfer operations associated with the command. All commands could result in a Command

Completion interrupt or status field of the UTRD for the command in the List being updated. UFS SW

may add commands to the List while it is running. The host controller supports interrupt aggregation,

such that a single command completion interrupt is generated for a pre-defined number of command

completions.

MIPI M-PHY

MIPI UniPro

UFS Transport Protocol Layer (UTP)

UFS InterConnect Layer (UIC)

UFS Command Set Layer

UFS Native Command Set UFS Adopted SCSI Command Set Future Extension

Task

Management

Device Manager

Application Layer

UTP_TM_SAP

UTP_CMD_SAP

UDM_SAPUIO_SAP

JEDEC Standard No. 223E

Page 9

4.3 Transfer Request Interface (cont’d)

• UTP Task Management Request List. This list is used by host software to implement

UTP_TM_SAP. The List consists of a data structure called UFS Task Management Request

Descriptor (UTMRD). UTMRD describes a task management function that host software wants the

attached device to execute. All the Task Management Requests will be prioritized over the transfer

requests listed in UTP Transfer Request List as described above. UFS host SW issues a task

management function to the host controller by placing a UTMRD on the List then rings the Host

Controller doorbell for the list. Functions are dispatched for execution by the UFSHCI in the order

that they are placed on the List even though they may be completed out of the order. All task

management functions could result in a Request Completion interrupt or status field of the UTMRD

for the function in the List being updated. UFS SW may add task management function to the List

while it is running. Interrupt aggregation is not supported for this list.

• UIC Command Register. This register set is used by host software to execute a UIC command

directly.

4.4 Multi-Circular Queue for UFSHCI4.0

To improve performance, UFS4.0 HCI introduce the option to use Multi-Circular Queue. With the

availability of this option, HCI can operate in legacy queue mode and be backward compatible with older

UFS device. Or the HCI can enable MCQ for improve performance with UFS4.0 device or later.

The Host Controller Capabilities register, bit 29, indicate if legacy queue is supported. And MCQueue

Config Register, bit 0, will allow SW to select the appropriate Queue mode, legacy queue or MCQ.

MCQ register set include MCQ capabilities register, MCQ configuration register, and MCQ definition.

Overview of the MCQ include

• Queues are core agnostic

• Submission & completion queue definition include the base address & doorbell registers

• Submission queue to include a Completion queue mapping. Mapping can be 1:1 or N:1

Figure 4 — Host Controller Multi-Circular Queue Example

(Head/Tail pointers of enabled queues are shown in bold box)

JEDEC Standard No. 223E

Page 10

4.4.1 Multi-Circular Queue (MCQ) Definition

A Multi-Circular Queue (MCQ) is a communication mechanism for passing messages from a producer to

a consumer. Circular queues are defined by:

• A queue entry size, appropriately sized for the largest message to be passed from the producer to

the consumer

• A message format such that the producer and consumer can encode the required message within

the queue entry

• A count of queue entries

• A pointer to a host memory region sized to accommodate the count of queue entries

• Doorbells indicate zero-based queue entry slots within the host memory region

• Doorbells increment from lower to higher integers corresponding with queue entry slots within

the host memory region

o A wrap condition occurs when a doorbell is incremented such that it is equal or greater to the

count of queue entries

o A wrap condition resets the doorbell to zero, pointing that doorbell to the start of the host

memory region

• A head doorbell, written by the consumer, indicating one of the queue entry address offset to the

start of host memory region

o Writes to the head doorbell indicate to the producer that one or more queue entries have been

consumed, creating empty queue entry locations for reuse

• A tail doorbell, written by the producer, indicating one of the queue entry address offset to the

start of host memory region

o A producer writes to the queue entry referenced by the current tail doorbell and then

increments the tail doorbell to the next empty queue entry address offset

o Writes to the tail doorbell indicate to the consumer that one or more queue entries have been

added to the circular queue

o Queue entries may only be added when incrementing the tail doorbell would not make it

equal to the head doorbell

• When the head and tail doorbells are equal, the queue is empty

o Note that this definition means there will always be one empty queue entry

• When the head and tail doorbells are not equal, the queue contains queue entries

4.4.2 Submission Queue Definition

A Submission Queue (SQ) is a specialized Circular Queue for which the Host SW is the producer and the

Host Controller is the consumer. The Host SW passes messages to the Host Controller indicating

submission of new commands to be processed by the UFS device. Each SQ identifies the CQ which will

receive its command completion notification once the HC has completed command processing, including

servicing all UPIU traffic required to complete that command. Details on the SQ data structure can be

found in section 6.2.1.

4.4.3 Completion Queue Definition

A Completion Queue (CQ) is a specialized Circular Queue for which the Host Controller is the producer

and the Host SW is the consumer. The Host Controller passes messages inside CQ Entries to the Host

SW indicating completion of commands. Each CQ Entry identifies which submission queue the

command originated in, and the unique identifier for that command, and command completion

status. Details on the CQ data structure can be found in section 6.2.2.

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