
47
TL-Plane-Based Multi-Core Energy-Efficient Real-Time Scheduling
Algorithm for Sporadic Tasks
DONGSONG ZHANG, National Laboratory of Parallel and Distributed Processing, National
University of Defense Technology
DEKE GUO and FANGYUAN CHEN, National University of Defense Technology
FEI WU, Shanghai University of Engineering Science
TONG WU, National University of Defense Technology
TING CAO, Australian National University
SHIYAO JIN, National Laboratory of Parallel and Distributed Processing, National University of Defense
Technology
As the energy consumption of multi-core systems becomes increasingly prominent, it’s a challenge to design
an energy-efficient real-time scheduling algorithm in multi-core systems for reducing the system energy
consumption while guaranteeing the feasibility of real-time tasks. In this paper, we focus on multi-core
processors, with the global Dynamic Voltage Frequency Scaling (DVFS) and Dynamic Power Management
(DPM) technologies. In this setting, we propose an energy-efficient real-time scheduling algorithm, the Time
Local remaining execution plane based Dynamic Voltage Frequency Scaling (TL-DVFS). TL-DVFS utilizes
the concept of Time Local remaining execution (TL) plane to dynamically scale the voltage and frequency of
a processor at the initial time of each TL plane as well as at the release time of a sporadic task in each TL
plane. Consequently, TL-DVFS can obtain a reasonable tradeoff between the real-time constraint and the
energy-saving while realizing the optimal feasibility of sporadic tasks. Mathematical analysis and extensive
simulations demonstrate that TL-DVFS always saves more energy than existing algorithms, especially in
the case of high workloads, and guarantees the optimal feasibility of sporadic tasks at the same time.
Categories and Subject Descriptors: C.3 [Special-Purpose and Application-Based Systems]: Real-time
and embedded systems; D.2.2 [Software Engineering]: Design Tools and Techniques
General Terms: Algorithms, Design, Performance
Additional Key Words and Phrases: Real-time system, energy-efficient scheduling, multi-core, sporadic task
This work was supported in part by the National Science Foundation of China under Grant Nos. 60903206,
61170284, 61173045, 61103084, and 61100075; the National Research Foundation for the Doctoral Program
of Higher Education of China under Grant No. 20104307110005; the China Postdoctoral Science Foundation
under Grant Nos. 20100480898 and 201104439; the Hunan Provincial Innovation Foundation for Postgradu-
ate of China under Grant No. CX2010B026; and the Research Foundation of National University of Defense
Technology under Grant No. JC10-05-01, and the Innovation Program of Shanghai Municipal Education
Commission under Grant No. 12ZZ182.
Authors’ addresses: D. S. Zhang, F. Y. Chen, and S. Y. Jin, PDL, School of Computer, National University
of Defense Technology, China; email: dszhang@nudt.edu.cn; D. K. Guo, School of Information System and
Management, National University of Defense Technology, China; F. Wu, College of Electronic and Electrical
Engineering, Shanghai University of Engineering Science, China; T. Wu, Center for National Security and
Strategic Studies, National University of Defense Technology, China; T. Cao, Research School of Computer
Science, Australian National University, Australia.
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DOI 10.1145/2086696.2086726 http://doi.acm.org/10.1145/2086696.2086726
ACM Transactions on Architecture and Code Optimization, Vol. 8, No. 4, Article 47, Publication date: January 2012.